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IPC-7352 strange evolutions

Printed From: PCB Libraries Forum
Category: Libraries
Forum Name: Footprints / Land Patterns
Forum Description: [General or a CAD specific issues / discussions]
URL: https://www.PCBLibraries.com/forum/forum_posts.asp?TID=3576
Printed Date: 18 Nov 2025 at 2:51pm


Topic: IPC-7352 strange evolutions
Posted By: sot23
Subject: IPC-7352 strange evolutions
Date Posted: 18 Nov 2025 at 8:23am
Hello, my team recently purchased the IPC-7352 released in 2023 and I am currently in the process of studying it to decide whether we should make it our new standard for footprints creation or not.

For the moment I must admit that I am not thrilled by what I have read.
Some exemples : 
  • Page 4 : Figure 3-2 depicts an SOIC instead of a 1206 capacitor. I know errors can happen, but on a document of this stature, it makes me question the review process if there is already that kind of mistake on page 4.
  • Page 10 we are introduced to the new method to calculate "Rectangular or square end components [...] where leads are 1, 2, 3 or 5 sided", the Toe calculation for such a component with a lead widths equal or larger than 0.5mm gives me abnormal results. It is said to be "25% of the nominal height of the component, or 0.5mm, whichever is less" for B level. If I take a very standard 0402 resistor from Vishay, TNPWe3 serie (width = 0.5 +/-0.05), with a nominal height of 0.35mm, it gives me a toe of 0.0875 (rounded to 0.09). That is less that the 0.15mm toe recommended for C level. How can that be possible ? 
  • Round off factor for Chip components smaller in widths than 0.5mm is 0.005mm increments. Has this been discussed with a PCB manufacturer ? 5µm variation on a PCB geometry seems quite small... And it will give an absolutely crazy amount of variations for the same footprint depending on the small variations by component manufacturers.
  • Section 4.4.1 "Nominal Hole Diameter" describes a method for calculating drill hole diameter. It is different than the method used in IPC-2222. Which one should we use ? This method doesn't take the board level into account, and therefore, doesn't take the tolerance of the hole into account. Seems odd. For exemple, for a round terminal on a 1.6mm thick board, the hole should be "Terminal diameter max + 0.15mm". On a level A PCB with 0.2mm tolerance, assuming it is centered, it would leave only 0.05mm more that the terminal diameter max which does not seem enough.

My question : what do you all think about 7352 ?
I would be very interested in your opinion specifically, Tom H, as I know you are very much involved in the IPC talks (thanks for all your work on that by the way). Is it a good upgrade to 7351B ? Honestly I was hoping for more.
But maybe I am a bit to difficult...
Sorry if my English is not perfect, as it is not my primary language.



Replies:
Posted By: Tom H
Date Posted: 18 Nov 2025 at 8:56am
IPC-7351B and IPC-7352 are identical for Surface Mount. No change except the pad stack naming convention added a double 'rr' for Rounded Rectangle pad shape. 

IPC-7352 introduced Through-hole technology, but most of the information was extracted from IPC-2221 & IPC-2222. The main thing that was added was the Through-hole land pattern naming convention which we created in 2008 but shelved until 2023.

The IPC-735x series misses the mark in several areas.

- Solder joint goals 'one size fits all' doesn't produce the best assembly attachment and it doesn't adhere to IPC J-STD-001. Also, the values between density levels is too robust. Most is too Most and Least is too Least.

- The naming convention puts the 'pin qty' at the end of the footprint name. This was changed in the IPC-7351C standard that was unanimously approved by the land pattern committee but never got released. 

- The Zero Component Rotation differs from the standard they replaced - IPC-SM-782

Related posts:

https://www.pcblibraries.com/forum/ipc7352-vs-pcb-libraries-footprint-naming-option_topic3488_post13869.html?KW=IPC%2D7352#13869" rel="nofollow - https://www.pcblibraries.com/forum/ipc7352-vs-pcb-libraries-footprint-naming-option_topic3488_post13869.html?KW=IPC%2D7352#13869

https://www.pcblibraries.com/forum/pcb-pad-footprint-orientation_topic3460_post14010.html?KW=IPC%2D7351B#14010" rel="nofollow - https://www.pcblibraries.com/forum/pcb-pad-footprint-orientation_topic3460_post14010.html?KW=IPC%2D7351B#14010



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