PCB Libraries Forum : PCB Libraries Guideline

PCB Libraries Guideline : ODA Pad Stack Naming Convention

Sat, 15 Aug 2026 11:00:45 +0000

Author: Nick B
Subject: ODA Pad Stack Naming Convention
Posted: 15 Aug 2026 at 11:00am

The pad stack consists of combinations of letters and numbers that represent shape, or dimensions of lands on different layers of printed boards or documentation. The name of the pad stack needs to represent all the various combinations. This pad stack naming convention was created by Optimum Design Associates.

Name Derivation: A pad stack name is a deterministic function of the pad stack geometry and the selected naming convention. It is not an attribute stored on the pad stack. The name shall be regenerated whenever the geometry changes, whenever the selected naming convention changes, and at the point where library or CAD output is produced - regardless of how the pad stack was originally created.

A name may be overridden manually. An overridden name shall be flagged as such and shall be the only case in which a stored string survives regeneration.

The first part of the pad stack convention consists of a land shape. There are six basic land shape identifiers. Note: All alphabetical characters are "UPPER CASE". All numeric values are represented in Micrometer units. All numeric values are represented in micrometer units, zero padded to a minimum of four digits. This applies uniformly to every dimension in a pad stack name - pads, lands, solder mask, solder paste, corner radii, tolerances, offsets, holes, slots and drills alike. A value requiring more than four digits is written at its natural width (e.g. 12.00 mm becomes 12000). Conversion examples: 1.500 mm = 1500; 0.860 mm = 0860; 0.90 mm = 0900; 0.25 mm = 0250; 4.00 mm = 4000; 0.050 mm = 0050.

Land Shape Letters (used for the pad itself)

C = Circular
S = Square
R = Rectangle
B = Oblong
G = Octagonal
Example: SG1500 (octagonal surface mount land, 1.500 across flats); THP0900G1500 (0.90 plated hole, octagonal 1.500 pad)
Reserved. Octagonal lands appear in legacy library content, where a small octagonal pad was sometimes placed at the center of a hole below the drill size. Plated, non-plated and donut pad stack types now cover those cases. The letter remains defined so existing names stay readable, but octagonal lands are NOT produced by automatic generation. A pad that is genuinely octagonal shall be named as a custom pad stack under SU_.
F = Finger D Shape

Pad Stack Type Prefixes (combine with a land shape letter)

SR = SMD Rectangle
SRCR = Surface Rounded Corner Rectangle
THP = Through Hole Plated
THN = Through Hole Non-plated
SU = User Defined Contour
DC = Donut Circular outside diameter
IDC = Inside Donut Circular
TC = Thermal Circular
TS = Thermal Square
TB = Thermal Oblong
TR = Thermal Rectangle
MHP = Mounting Hole Plated
MHN = Mounting Hole Non-Plated
V = Via
FID = Fiducial

Illegal characters:

" " , ; : / \ [ ] ( ) . { } * & % # $ ! @ ^ =

Maximum length: A pad stack name shall not exceed 31 characters. Where a generated name would exceed the limit, generation shall fail with a diagnostic rather than emit a truncated or altered name.

Name Structure Order

SR2000X1000

Surface Mount Rectangle 2.000 X 1.000

THP0900C1500

Through-hole Plated 0.90 Hole, Circular 1.500 Pad

SRCR2430X2370X0050

Surface Rounded Corner Rectangle 2.430 long X 2.370 short X 0.050 corner radius

Modifier Order: Where more than one modifier applies, they are appended in this fixed order: 1. internal layer modifier (_INP); 2. solder paste modifiers (_SSP, _NSP, _TSP, _BSP); 3. solder mask modifiers (_1TO1, _SSM, _NSM, _TSM, _BSM, _STM, _SBM, _TNTT, _TNTB, _CAPT, _CAPB); 4. miscellaneous modifiers (_OFF, _TOL, _OBS, _PFIT, _UV, _PCH, _VT, _BWT). Example: MHP4000C7000_INP5200_SSM7200 (the internal layer pad callout precedes the mask callout).

Separator Convention

'X' is used to separate dimensions within a given shape, and '_' is used to separate the different aspects of the naming convention.

Example: SR0640X0630_SSM0660X0650 (Selective Solder Mask callout appended when the mask deviates from the standard overage of .05 on each side / .1 overall expansion. In this example, .01 on each side / .02 overall expansion is used.)

Shape Deviation: When a solder mask or solder paste layer is a DIFFERENT SHAPE from the copper pad, the callout carries the shape letter before the dimensions, so the layer is fully described: _SSM + shape letter + dimensions, and _SSP + shape letter + dimensions.

Example: SC0230_SSPRCR0250X0250X0050 - Circular copper 0.230, standard solder mask (no callout required), selective solder paste as a rounded corner rectangle 0.250 X 0.250 with 0.050 corner radius.

When the shape matches the copper, the shape letter is omitted and the dimensions alone follow the modifier, e.g. SR3000X1500_SSM3300X1800.

Per-layer corner radius: each layer carries its own shape AND its own corner radius, appended as a final X value in the same form used by SRCR. Copper, solder mask and solder paste may each be a different shape with a different corner radius, and each is described in its own callout. A corner radius stated for one layer never applies to another.

Dimension Order

Any time the pad is longer on one side than the other, the longest edge is presented first in the pad stack naming convention.

Solder Mask Modifiers

_NSM = None
_SSM = Selective Solder Mask. The mask departs from the default expansion and is described explicitly. Dimensions follow the modifier; where the mask shape also differs from the copper, the shape letter precedes the dimensions (see Shape Deviation).
_TSM = Top Side Only
_BSM = Bottom Side Only
_STM = Specified Top
_SBM = Specified Bottom
_TNTT = Tented Top
_TNTB = Tented Bottom
_CAPT = Via Cap Top
_CAPB = Via Cap Bottom
_1TO1 = Solder mask is the same size AND the same shape as the copper pad, with all other aspects of the pad stack standard (paste 1:1). Takes precedence over _SSM: a 1:1 mask is named _1TO1, never _SSM. If the paste also deviates, _1TO1 still applies to the mask and the paste is called out separately, in the order given under Modifier Order (paste precedes mask): SR0860X0250_SSP0700X0200_1TO1. A mask that matches the copper in size but NOT in shape is not 1:1 - use _SSM with the shape letter (see Shape Deviation).
Applicability of Modifiers: The solder mask and solder paste modifiers apply to ALL pad stack types - surface mount, through hole, mounting hole, via and fiducial - and to every layer within them. A modifier is appended any time a layer deviates from the default stated above, and only then. Paste present on a through-hole pad stack is a deviation and shall be called out.

Solder Paste Modifiers

_NSP = No Solder Paste
_SSP = Selective Solder Paste. The paste departs from the default 1:1 relationship with the copper and is described explicitly.
_TSP = Top Specified Paste
_BSP = Bottom Specified Paste
Applicability of Modifiers: The solder mask and solder paste modifiers apply to ALL pad stack types - surface mount, through hole, mounting hole, via and fiducial - and to every layer within them. A modifier is appended any time a layer deviates from the default stated above, and only then. Paste present on a through-hole pad stack is a deviation and shall be called out.

Layer and Size Modifiers

_INP = Inner Layer Pad Size
_BTP = Opposite/Bottom Side Pad. Used where the bottom side land of a through-hole, mounting hole or via pad stack differs in size from the top side land. Value is the bottom pad dimension.
Reserved. Asymmetric pad stacks are not currently part of our library and _BTP is NOT produced by automatic generation. The letter remains defined so legacy and hand-authored names stay valid. Where automatic generation encounters a pad stack whose bottom land differs from the top, it shall be named as a custom pad stack under SU_ rather than share a name with the symmetric variant.
_BOT = Bottom Surface Mount

Thermal and Plane Modifiers

Thermal Spoke Count = 4 Ties at 45° is default
TC or TS or TB or TR + D (Hole) + A (Annular) G (Gap) T (Tie) - TCD1250A0120G0100T0120
BTH = Buried Thermal
THRM = Via with Thermal Relief

Miscellaneous Modifiers

_OFF = Offset
_OBS = Keep-out/Obstruct
_N = Non-Plated Hole
_TOL (+tol)X(-tol) – TOL0105X0075 (+0.105 mm / -0.075 mm, four digit micrometre form for both values)
_VT = Via Tolerance
_PCH = Punched Hole
_PFIT = Press Fit
_UV = Microvia
_BWT = Bottom Wave Tech

Chamfered and Radius Corner Pad Stacks

Chamfered corner pad stacks are named as custom pad stacks using the SU_ prefix per the User Defined / Custom Pad Stacks section. Drawing the chamfer at the CAD tool footprint level instead remains permitted for hand-authored parts, but automatic generation shall always produce an SU_ name.

Radius cornered pads fall under B obrounds (4 corners) or F fingers (2 corners). Rounded corner rectangles (where the corner radius does not form a full obround or finger) use the SRCR prefix: SRCR + long side X short side X corner radius value (e.g., SRCR2430X2370X0050). Any other non-standard corner configuration would fall under SU custom pad/pad stack naming.

User Defined / Custom Pad Stacks

Named specifically since they won't be used generically and are seen as being used 1 to 1 with a part number or package.

SU__
SU = custom pad stack
FOOTPRINT NAME = the name of the footprint the pad stack belongs to, which already encodes manufacturer and package identity (e.g. INFINEON_PG-TSDSON-8-FL).
MFR = Manufacturer
MPN or PACKAGE ID = Manufacturer Part number or Manufacturer Package ID

n = a positive integer, starting at 1, assigned per DISTINCT custom pad stack within that footprint. Two pins whose custom pad stacks are identical in geometry across every layer share the same n; pad stacks that differ in any way receive different numbers. Numbers are assigned in ascending pin order of first appearance, so that rebuilding the same footprint always yields the same names.

Example: SU_INFINEON_PG-TSDSON-8-FL_1, SU_INFINEON_PG-TSDSON-8-FL_2

Manual variants such as L and R remain permitted for hand-authored pad stacks but shall not be produced automatically.

Alternate SU format

SU_ManufacturerPrefix_CaseCode_#

Example:

SU_TI_RRX0029B_1 (Texas Instruments, RRX0029B case code, pad variant 1)

Default Values

Solder Mask Size – 0.100 larger than pad
Paste Mask Size – 1:1 scale of pad size
Inner Layer Shape – Round internal pads for Square through-hole pad
Thermal Ties – 4 ties at 45 degrees
Via Thermals – Buried thermal (no relief)
Drill Tolerance – ± 0.075 mm (holes ≤ 2.50 mm) or ± 0.10 mm (holes > 2.50 mm)
Via Drill Tolerance – + 0.075 mm / - hole size
Standard Pad Stack: A pad stack is standard when its solder mask is the default 0.100 mm overall expansion of the copper in the same shape, and its solder paste is 1:1 with the copper in the same shape. A standard pad stack carries no mask or paste modifier in its name.
It follows that the presence of _1TO1, _SSM, _SSP, _NSM or _NSP is exactly equivalent to the pad stack being non-standard. The name and any reported standard/non-standard status must be derived from the same test and can never disagree.
Applicability of Defaults: The default solder mask expansion of 0.100 mm overall applies to EVERY layer that carries a mask opening - surface mount lands, through-hole pads, mounting holes, and opposite/bottom side layers alike. The default solder paste relationship of 1:1 applies wherever paste is present. Through-hole pad stacks carry no paste by default.

Individual Pad and Hole Naming Convention

In addition to the pad stack name, the individual pads and holes within a pad stack follow their own naming conventions. These names are derived from the parent pad stack name and describe the specific layer-level objects.

SMD Pad Naming

For surface mount pads, the individual pad name is derived from the pad stack name by removing the leading "S" prefix. The pad dimensions in the name remain identical to the pad stack.

Convention: Remove the "S" prefix from the pad stack name. The resulting name is assigned to the copper pad on most layers.

Solder Mask Pad: When solder mask uses the default expansion (0.05 mm per side / 0.10 mm overall), the mask pad name reflects the expanded dimensions using the same format.

Example: Pad stack SR0860X0250 → Copper pad name is R0860X0250 (assigned to most layers), Solder mask pad name is R0960X0350 (reflects the 0.05 mm per side expansion).

Through-Hole and Mounting Hole Naming

Holes within through-hole and mounting hole pad stacks are named to describe the hole shape, diameter, and plating status.

Convention: The hole name follows the format: Shape + Diameter + Plating Suffix.

Shape: "Rnd" for round holes.

Diameter: Expressed in millimeters (e.g., 0.40 for a 0.40 mm hole).

Plating Suffix: "P" for plated holes, "N" for non-plated holes.

Example: Rnd 0.40P = Round, 0.40 mm diameter, plated hole.

Example: Rnd 3.20N = Round, 3.20 mm diameter, non-plated hole.

Hole Tolerance Suffix

Default tolerance: ±0.075 mm for holes up to 2.50 mm, and ±0.10 mm for holes larger than 2.50 mm. When the default tolerance applies, no suffix is appended to the hole name.

Non-default tolerance: When a tolerance other than the default is required, a _TOL suffix is appended to the hole name. The suffix value is expressed in micrometers representing the ± tolerance.

Example: Rnd 0.40P_TOL0050 = Round, 0.40 mm, Plated, with ±0.05 mm tolerance (instead of the default ±0.075 mm).

Example: Rnd 3.00P_TOL0150 = Round, 3.00 mm, Plated, with ±0.15 mm tolerance (instead of the default ±0.10 mm).

Pad Stack Name Examples

Surface Mount Pads

Rectangle SMD 2.00 x 1.00 – SR2000X1000
Oblong SMD 3.00 x 1.50 – SB3000X1500
Square SMD 3.50 – SS3500
Circular SMD 1.00 – SC1000
Rounded Corner Rectangle SMD 2.430 x 2.370, 0.050 corner radius – SRCR2430X2370X0050
Rectangle with custom Solder Mask – SR3000X1500_SSM3300X1800
Rectangle with custom Solder Paste – SR3000X1500_SSP2700X1200
Rectangle with Offset Origin – SR3000X1500_OFF0500
Custom pad Texas Instruments RDM package left side – SU_TI_RDM_L

Through-hole Pads

0.90 Plated hole, Circular 1.50 pad – THP0900C1500
0.90 Plated hole, Square 1.50 pad – THP0900S1500
TH with Inner layer pad different size – THP0900C1500_INP1400
TH with Opposite side pad different size – THP0900C1500_BTP1700
0.90 non-plated hole, Circle 1.50 pad – THN0900C1500
Plated Oblong Slot 3.00 x 1.00, pad 4.00 x 2.00 – THP3000X1000B4000X2000

Individual Pad and Hole Name Examples

SR0860X0250 → Copper pad: R0860X0250, Solder mask pad: R0960X0350
SS3500 → Copper pad: S3500, Solder mask pad: S3600
THP0900C1500 → Hole: Rnd 0.90P (default tolerance ±0.075 mm, no suffix)
THP040C1000 → Hole: Rnd 0.40P_TOL0050 (non-default tolerance of ±0.050 mm)
THN320C5000 → Hole: Rnd 3.20N (non-plated, default tolerance ±0.10 mm)
MHP4000C7000 → Hole: Rnd 4.00P (default tolerance ±0.10 mm)

Vias

Standard via 0.50/0.25 – V0250C0500
Square via 0.50/0.25 – V0250S0500
Via with opposite size – V0250C0500_BTP0700
Blind via L1-L3 – V0150C0300 (layer in tool)
Via with thermal relief – V0250C0500_THRM

Mounting Holes

Plated MH 4.00 hole, 7.00 pad – MHP4000C7000
Non-Plated MH 4.00 hole – MHN4000
MH w/ inner layer & mask – MHP4000C7000_INP5200_SSM7200

Fiducials

Circular 1.00, mask 2.00, KO – FID_CELL_1000
Global fiducial – FID_GLOBAL

ODA Footprint Naming Convention

Footprint names follow IPC-7351 conventions where applicable. The material condition suffixes L, N, and M are used when the IPC nominal land pattern is selected.

IPC Nominal Land Pattern (L, N, M suffixes)

When the IPC nominal land pattern is used, the standard IPC material condition suffixes apply:

L = Least material condition (most solder fillet)
N = Nominal material condition
M = Most material condition (least solder fillet)

Example: SOT23-5P95_290X280X145L45X40N

IPC Standard Package with Manufacturer-Recommended Footprint (Q suffix)

If the package type is an IPC standard one but the manufacturer-recommended footprint is chosen instead, the Q material condition suffix is used per our standard in place of L, N, or M, followed by the manufacturer prefix and the case code.

Example: SOT23-5P95_290X280X145L45X40Q_TI_DBV0005A

Non-IPC Standard Package or RF Component (Manufacturer Prefix + Case Code)

If the package type is not an IPC standard one, or if it is an RF component, the manufacturer-recommended footprint is used and named with the manufacturer prefix and case code directly.

Example: TI_RRX0029B

PCB Libraries Guideline : IPC-7352 Pad Stack Naming Convention

Sat, 15 Aug 2026 11:00:46 +0000

Author: Nick B
Subject: IPC-7352 Pad Stack Naming Convention
Posted: 15 Aug 2026 at 11:00am

The pad stack consists of combinations of letters and numbers that represent shape, or dimensions of lands on different layers of printed boards or documentation. The name of the pad stack needs to represent all the various combinations. These are used in combination with the land pattern conventions defined herein according to the rules established in the IPC-2220 Design standards.

All dimensions in this Naming Convention section are in "mm", unless otherwise noted.

The first part of the pad stack convention consists of a land shape. There are ten basic land shape identifiers. Note: All alphabetical characters are "lower case". This helps discriminate numeric values.

Basic Land Shape Letters

r = Rectangle
rr = Rounded Rectangle
cr = Chamfered Rectangle
b = Oblong
d = D Shape (Square on one end and Circular on the other end)
c = Circular
s = Square
rs = Rounded Square
cs = Chamfered Square
u = User Defined Contour (Irregular Shape)

Pad Stack Defaults

Solder Mask is 1:1 scale of the land size
Paste Mask is 1:1 scale of the land size
The Assembly Layer land is 1:1 scale of the land size
Inner Layer Land is the same shape as the outer layer land
The Primary and Secondary lands are the same size
The inner layer land shapes are Circular
Vias are Circular
Thermal ID, OD and Spoke Width sizes follow the IPC Level A, B or C
Plane Clearance Anti-pad size follows the IPC Level A, B or C
Thermals have 4 spokes
Mounting Holes are Circular

Note: Every board fabricator’s ability to register solder mask is different. The 1:1 scale solder mask covers the variation, and so long as manufacturers are building to specs such as IPC-6012 that say you can’t have mis-registration of the solder mask.

Illegal characters that cannot be used (Microsoft requirement) include " " , ; : / \ [ ] ( ) . { } * & % # $ ! @ ^ =

Examples utilizing the pad stack naming convention (all values are in metric units)

Note: Every number goes two places to the right and as many as needed to the left of the decimal

Examples: 1150 = 11.50 or 11500 μm, 150 = 1.50 or 1500 μm, 15 = 0.15 or 150 μm

c150h90 where "c" denotes a Circular land with a 1.50 diameter and H denotes a hole size of 0.90
c130_95 Donut pad where "c" denotes a Circular land with a 1.30 OD diameter and 95 denotes the ID diameter
c130_95hn70k147 Donut pad - "c" denotes a Circular land with a 1.30 OD diameter and 95 denotes the ID diameter and hn70 denotes hole, non-plated 0.70 diameter and k147 denotes a keep-out 1.47 diameter
v50h25 where a "v" denotes a via with a 0.50 land (default Circular land) and h denotes a 0.25 hole
s150h90 where "s" denotes a 1.50 Square land and h denotes a hole size of 0.90
s350 where "s" denotes a square SMT land size of 3.50
r200_100 where "r" denotes a Rectangular SMT land 2.00 land length X 1.00 land width
b300_150 where "b" denotes a SMT Oblong land size of 3.00 X 1.50
b400_200h100 where "b" denotes an Oblong land size of 4.00 length X 2.00 width and 1.00 hole
d300_150 where "d" denotes land with one circular end and one square end (looks like a D) 3.00 X 1.50
v30h15l1-3 where "v" denotes a 0.30 blind via with 0.15 Hole; 1 is the starting layer, 3 is the end layer
r200_100r5 = Rounded Rectangular 2.00 X 1.00 X 0.05 radius corners
r200_100c10 = Chamfered Rectangular 2.00 X 1.00 X 0.10 chamfered corners
v30h15l3-6 where "v" denotes a 0.30 buried via with 0.15 Hole; 3 is the starting layer, 6 is the end layer

Note: It is assumed that the through-hole pad stack has the same value as the mounted layer size and shape for -

Inner Layer
Opposite Side
Solder Mask
Solder Paste
Assembly Layers

It is also assumed that the "Plane Clearance" and "Thermal Relief" data follows the through-hole convention guidelines defined in the IPC-2221 and IPC-2222 standards.

Modifiers that are used when pad stack features are different than the defaults

These are the "Variants" or "Modifiers" that go after the basic pad stack naming convention.

These are used when the User needs to change the pad stack default values either by a different dimension or a different shape. In instances where shapes are different this becomes a two letter code with the modifier first followed by the land shape letter.

n = Non-plated Hole
z = Inner Layer land dimension if different than the land on primary layer
x = Special modifier used alone or following other modifiers for lands on opposite side to primary layer land dimension
t = Thermal Relief; if different than IPC standard pad stack – tid_od_sw for 4 spoke default
m = Solder Mask if different than default 1:1 scale of land
p = Solder Paste if different than default 1:1 scale of land
a = Assembly surface land if different than default 1:1 scale of land
y = Plane Clearance (Anti-pad) if the value is different than the Thermal OD
o = Offset Pad & Solder Mask with the same + / - value
om = Offset Solder Mask Only + / - value
op = Offset Paste Mask only + / - value
k = Keep-out
r = Radius for Rounded Rectangular Land Shape
c = Chamfer for Chamfered Rectangular Land Shape

Shape change is the last letter in the string prior to the dimension.

Other usage of the pad stack naming convention

USE of letter v: Vias can be named using the pad stack naming convention. Because most vias use lands that are circular in shape, the letter "v" will be used in place of the letter "c" in the pad stack naming convention. If this is not true the modifiers can be added after the letter "v" to signify shape or dimensional changes to this default.

USE of letter w: In addition to Vias the pad stack naming convention can also be used for defining mounting holes. The letter "w" shall be used to define the mounting hole characteristics and any associated lands used for the surface lands (either plated or un-plated)

Examples of double character modifiers:

ts = Thermal Square; if different than the top side land shape and dimensions
sw = Thermal spoke width
zs = Inner Layer Land Shape is Square (Note: The default is circular)
m0 = No Solder Mask
mxc = Solder Mask Opposite Side Circular
mx0 = Solder Mask Opposite Side No Solder Mask
p0 = No Paste Mask
xc = Opposite Side Circular
vs = Via with Square land
hn = Non-plated Hole

Modifier Example for Through-hole:

s150h90zs150 = where "s" is Square 1.50 land with 0.90 Hole with 1.50 inner (Z) Layer Square land
c150h90zc150 = where "c" is Circular 1.50 land with 0.90 Hole with 1.50 inner (Z) Layer Circular land

Modifier Examples for Vias:

vs50h25 where "vs" denotes a 0.50 Square Via with a 0.25 Hole
v50h25xs70 where "v" is 0.50 Circular Via with 0.25 Hole and 0.70 Square land on opposite side

Chamfered & Rounded corner modifiers are used to indicate which corner(s) are modified. Order of precedence has been given to the first 4 modifiers.

Modifiers:

bl – bottom left
br – bottom right
ul – upper left
ur – upper right
ulr – upper left & right
blr – bottom left & right
ubl – upper and bottom left
ubr – upper and bottom right

Rounded and Chamfered lands in "one corner" Modifier Examples:

r100_200rbl50 = rectangular land 1.00 x 2.00 with 0.50 radius for rounded corner in bottom left corner
r100_200rbr50 = rectangular land 1.00 x 2.00 with 0.50 radius for rounded corner in bottom right corner
r100_200rul50 = rectangular land 1.00 x 2.00 with 0.50 radius for rounded corner in upper left corner
r100_200rur50 = rectangular land 1.00 x 2.00 with 0.50 radius for rounded corner in upper right corner
r100_200cbl50 = rectangular land 1.00 x 2.00 with 0.50 chamfer for chamfer corner in bottom left corner
r100_200cbr50 = rectangular land 1.00 x 2.00 with 0.50 chamfer for chamfer corner in bottom right corner
r100_200cul50 = rectangular land 1.00 x 2.00 with 0.50 chamfer for chamfer corner in upper left corner
r100_200cur50 = rectangular land 1.00 x 2.00 with 0.50 chamfer for chamfer corner in upper right corner

Examples of a square land with 3 rounded and 1 chamfered corner (for Thermal Pad)

s300p190r25cul50 = square 3.00 land, square paste 1.90, corner radius 0.25, upper-left chamfer 0.50
s300p190r25cbl50 = square 3.00 land, square paste 1.90, corner radius 0.25, bottom-left chamfer 0.50

Chamfered and Rounded Rectangular with all four corners chamfered does not need a corner modifier. Modifier Examples with Rounded Rectangle Land Shape:

r200_100r50 = rectangular land 2.00 x 1.00 with 0.50 radius for rounded corners in all 4 corners
r200_100c50 = rectangular land 2.00 x 1.00 with 0.50 chamfer for chamfered corners in all 4 corners

Examples of a pad stack with Circular land with hole using various modifiers

c150h90 = Default pad stack with a 1.50 circular land with a 0.90 hole (no modifiers used)
c150hn90 = Default pad stack with a 1.50 circular land with a 0.90 non-plated hole (no modifiers used)
c150h90z140 = Inner layer land is smaller than external lands 1.40 or 0.10 smaller
c150h90z140x170 = Opposite side land is larger than top side land 1.70 or 0.20 larger
c150h90z140x170m165mx185 = Solder mask opening for top and bottom lands 0.15 larger for each
c150h90z140x170m165mX185a200 = Assembly drawing land in 0.50 larger than 1.50 primary land
c150h90z140x170m165mx185a200y300 = Plane clearance anti-pad diameter is 3.00
c150h90z140x170m165mx85 = Solder mask encroachment on opposite land by 0.65 smaller
c150h90m165 = adding a solder mask opening of 1.65 diameter or 0.15 larger than land
c150h90t150_180_40 = Thermal ID 1.50, OD 1.80, Spoke Width 0.40, Anti-pad 1.80
c150h90t150_180_40y200 = Anti-pad 2.00 (because the size is different than the Thermal OD)
c150h90t150_180_80_2 = Spoke Width 0.80 with 2 Spokes
c150h90m165t150_180_40 = Solder Mask 1.65

Examples of a pad stack with Oblong land with Slotted Hole

Sample - b = Oblong Land Shape then "X" dimension (length) then Underscore _ "Y" dimension (width)
b400_200h300_100 = Oblong land 4 length X 2 width with slotted hole size 3 X 1
b400_200hn300_100 = Oblong land 4 X 2 with non-plated slotted hole size 3 X 1

Examples of a SMT pad stack land using various modifiers

b300_150 = Default pad stack with a 3.00 length and 1.50 width land (no modifiers used)
b300_150m330_180 = Solder Mask is 0.30 larger than the land on all sides
b300_150m330_180p240_140 = Solder Paste is smaller by 0.10 width and 0.60 length
b300_150b-50 = Oblong Land 3.00 X 1.50 w/Offset Origin negative 0.50
r400_200pb430_230 = Rectangle SMT land 4.00 X 2.00 with an Oblong Paste Mask size of 4.30 X 2.30

Example of Thermal Pads for QFN, SON, QFP and SOP

Square Configurations

s480p4s152 = 4.80 Square Land with 4 Paste Mask Squares 1.52 each

s480p4s152cul50 = 4.80 Square Land with 4 Paste Mask Squares 1.52 each with 0.50 Chamfer in Upper Left corner

s480p4s152cul50r25 = 4.80 Square Land with 4 Paste Mask Squares 1.52 each with 0.50 Chamfer in Upper Left corner with 0.25 corner Radius

Example of a Mounting Hole

w700h400z520m720 = This is a Plated Through Mounting hole for a #6-32 screw using a 4.00 diameter hole and having a circular 7.00 land on the primary and secondary side of the board, with a solder mask clearance that is 0.20 larger than the 7.20 land. The internal lands are smaller that the external and are also circular 5.20 in diameter.
w700hn400z520m720 = Non-plated version

Example of a Local Fiducial for Fine Pitch SMT Components

c100m200k200 = Circular Land 1.00 with Solder Mask 2.00 with Keep-out 2.00
s100m200k200 = Square Land 1.00 with Solder Mask 2.00 with Keep-out 2.00

Example of Proportional Plated Through-hole Pad Stack

c150h100 = 1.50 circular pad with 1.00 hole with 1.50 solder mask with 1.50 plane clearance with 1.50 assembly outline with Thermal Relief w/4 spokes 0.40 width with ID 1.50 and OD 1.80

Example of Proportional Non-plated Through-hole Pad Stack

c100hn150 = 1.00 circular pad with 1.50 hole "non-plated" with 1.50 solder mask with 2.35 plane clearance with 2.10 keep-out

PCB Libraries Guideline : IPC-7352 Footprint Naming Convention: Through-hole

Sat, 15 Aug 2026 11:00:47 +0000

Author: Nick B
Subject: IPC-7352 Footprint Naming Convention: Through-hole
Posted: 15 Aug 2026 at 11:00am

The land pattern naming convention uses component dimensions to derive the land pattern name.

The first 3 - 6 characters in the land pattern name describe the component family.

The first number in the land pattern name refers to the Lead Spacing or hole to hole location to insert the component lead.

All numbers that follow the Lead Spacing are component dimensions.

These characters are used as component body identifiers that precede the value and this is the priority order of the component body identifiers –

P = Pitch for components with more than two leads
W = Maximum Lead Width (or Component Lead Diameter)
L = Body Length for horizontal mounting
D = Body Diameter for round component body
T = Body Thickness for rectangular component body
H = Height for vertically mounted components
Q = Pin Quantity for components with more than two leads
R = Number of Rows for connectors

Notes:

All component body values are in millimeters and go two places to the right of the decimal point and no leading zeros.

All Complexity Levels used in the examples are "B".

Component, Category	Land Pattern Name
Capacitors, Non-Polarized Axial Diameter Horizontal Mounting	CAPAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Capacitors, Non-Polarized Axial Rectangular	CAPAR + Lead Spacing + W Lead Width + L Body Length + T Body thickness + H Body Height
Capacitors, Non-Polarized Axial Diameter Vertical Mounting	CAPADV + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Capacitors, Non-Polarized Axial Rect. Vert. Mtg.	CAPARV + Lead Spacing + W Lead Width + L Body Length + T Body Thickness + H Body Height
Capacitors, Non-Polarized Radial Diameter	CAPRD + Lead Spacing + W Lead Width + D Body Diameter + H Body Height
Capacitors, Non-Polarized Radial Rectangular	CAPRR + Lead Spacing + W Lead Width + L Body Length + T Body thickness + H Body Height
Capacitors, Non-Polarized Radial Disk Button	CAPRB + Lead Spacing + W Lead Width + L Body Length + T Body thickness + H Body Height
Capacitors, Polarized Axial Diameter Horizontal Mounting	CAPPAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Capacitor, Polarized Radial Diameter	CAPPRD + Lead Spacing + W Lead Width + D Body Diameter + H Body Height
Diodes, Axial Diameter Horizontal Mounting	DIOAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Diodes, Axial Diameter Vertical Mounting	DIOADV + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Dual-In-Line Packages	DIP + Lead Span + W Lead Width + P Pin Pitch + L Body Length + H Component Height + Q Pin Qty
Dual-In-Line Sockets	DIPS + Lead Span + W Lead Width + P Pin Pitch + L Body Length + H Component Height + Q Pin Qty
Headers, Vertical	HDRV + Lead Span + W Lead Width + P Pin Pitch + R Pins per Row + L Body Length + T Body Thickness + H Height
Headers, Right Angle	HDRRA + Lead Span + W Lead Width + P Pin Pitch + R Pins per Row + L Body Length + T Body Thickness + H Height
Inductors, Axial Diameter Horizontal Mounting	INDAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Inductors, Axial Diameter Vertical Mounting	INDADV + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Inductors, Non-Polarized, Radial Diameter	INDRD + Lead Spacing + W Lead Width + D Body Diameter + H Body Height
Inductors, Polarized, Radial Diameter	INDPRD + Lead Spacing + W Lead Width + D Body Diameter + H Body Height
Jumpers, Wire	JUMP + Lead Spacing + W Lead Width
Mounting Holes Plated with Support Pad	MTGP + Pad Size + H Hole Size + Z Inner Layer Pad Size
Mounting Holes Non-Plated With Support Pad	MTGNP + Pad Size + H Hole Size + Z Inner Layer Pad Size
Mounting Holes Non-Plated Without Support Pad	MTGNP + Pad Size + H Hole Size + Z Inner Layer Pad Size + K Keep-out Diameter
Mounting Holes Plated with 8 Vias	MTGP + Pad Size + H Hole Size + Z Inner Layer Pad Size + 8 Vias
Pin Grid Array’s	PGA + Pin Qty + P Pitch + C Pin Columns + R Pin Rows + L Body Length X Body Width + H Component Height
Resistors, Axial Diameter Horizontal Mounting	RESAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Resistors, Axial Diameter Vertical Mounting	RESADV + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Resistors, Axial Rectangular Horizontal Mounting	RESAR + Lead Spacing + W Lead Width + L Body Length + T Body thickness + H Body Height
Single-In-Line Packages	SIP + Body Width + W Lead Width + P Pin Pitch + L Body Length + H Component Height + Q Pin Qty
Test Points, Round Land	TP + Lead Width
Test Points, Square Land	TPS + Lead Width
Test Points, Top Land Round & Bottom Land Square	TPRS + Lead Width
Wire	PAD + Wire Width

PCB Libraries Guideline : PCBL Footprint Naming Convention: Surface Mount

Sat, 15 Aug 2026 11:00:48 +0000

Author: Nick B
Subject: PCBL Footprint Naming Convention: Surface Mount
Posted: 15 Aug 2026 at 11:00am

Common package types and their respective naming conventions are listed below.

Ball Grid Array’s with Alphanumeric Rows	BGA + Pin Qty. + C or N + P Pitch _ Ball Columns X Ball Rows _ Body Length X Width X Height + B Ball Diameter
Ball Grid Array’s with Alphanumeric Columns	BGA + Pin Qty. + C or N + P Pitch + A + Ball Columns X Ball Rows _ Body Length X Width X Height + B Ball Diameter
BGA w/Dual Pitch	BGA + Pin Qty. + C or N + P Col Pitch X Row Pitch _ Ball Columns X Ball Rows _ Body Length X Width X Height + B Ball Diameter
BGA w/Staggered Pins	BGAS + Pin Qty. + C or N + P Pitch _ Ball Columns X Ball Rows _ Body Length X Width X Height + B Ball Diameter
Capacitors, Aluminum Electrolytic	CAPAE + Base Body Size X Height + L Lead Length X Width
Capacitors, Chip, Array, Concave	CAPCAV + Pin Qty. + P Pitch _ + Body Length X Width X Height + L Lead Length X Width
Capacitors, Chip, Array, Flat	CAPCAF + Pin Qty. + P Pitch _ + Body Length X Width X Height + L Lead Length X Width
Capacitors, Chip	CAPC + Body Length X Width X Height + L Lead Length
Capacitors, Dual Flat No-lead	CAPDFN + Body Length X Width X Height + L Lead Length X Width
Capacitors, Molded	CAPM + Lead Span X Body Width X Height + L Lead Length X Width
Capacitors, Polarized, Chip	CAPPC + Body Length X Width X Height + L Lead Length
Capacitors, Polarized, Dual Flat No-lead	CAPPDFN + Body Length X Width X Height + L Lead Length X Width
Capacitors, Polarized, Molded	CAPPM + Lead Span X Body Width X Height + L Lead Length X Width
Capacitors, Side Concave, 2 Pin	CAPSC + Body Length X Height + L Lead Length X Width
Ceramic Flat Packages	CFP + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Column Grid Array, Circular Lead	CGA + Pin Qty. P Pitch _ Pin Columns X Pin Rows _ Body Length X Width X Height + L Diameter
Pillar Column Grid Array	PCGA + Pin Qty. P Pitch _ Pin Columns X Pin Rows _ Body Length X Width X Height + L Diameter
Crystals (2 leads)	XTAL + Body Length X Width X Height + L Lead Length X Width
Crystals, Dual Flat No-lead	XTALDFN + Body Length X Width X Height + L Lead Length X Width
Crystals, Side Concave	XTALSC + Body Length X Height + L Lead Length X Width
Diodes, Chip	DIOC + Body Length X Width X Height + L Lead Length
Diodes, Dual Flat No-lead	DIODFN + Pin Qty. _ Body Length X Width X Height + L Lead Length X Width
Diodes, Molded	DIOM + Lead Span X Body Width X Height + L Lead Length X Width
Diodes, Non-polarized, Chip	DIONC + Lead Span X Body Width X Height + L Lead Length
Diodes, Non-polarized, Dual Flat No-lead	DIONDFN + Pin Qty. _ Body Length X Width X Height + L Lead Length X Width
Diodes, Non-polarized, Molded	DIONM + Lead Span X Body Width X Height + L Lead Length X Width
Diodes, MELF	DIOMELF + Body Length + Diameter + L Lead Length
Diodes, Side Concave	DIOSC + Body Length X Width X Height + L Lead Length
Diodes, Side Concave, 4 Pin	DIOSC4 + P Pitch _ Body Length X Width X Height + L Lead Length
Diodes, Small Outline Flat Lead, 2 Pin	SODFL + Lead Span X Body Width X Height + L Lead Length X Width
Diodes, Small Outline Flat Lead, 3 - 6 Pin	DIOSOFL + Pin Qty. + P Pitch _ + Lead Span X Body Height + L Lead Length X Width
DPAK	DPAK + Pin Qty. + P Pitch _ Lead Span X Height + L Lead Length X Width + T Thermal Tab Pad Length X Width
Ferrite Bead, Chip	BEADC + Body Length X Width X Height + L Lead Length
Fuses, Chip	FUSC + Body Length X Width X Height + L Lead Length
Fuses, Dual Flat No-Lead	FUSDFN + Body Length X Width X Height + L Lead Length X Lead Width
Fuses, Molded	FUSM + Lead Span X Body Width X Height + L Lead Length X Lead Width
Fuses, Side Concave	FUSSC + Body Length X Height + L Lead Length X Width
IC, Small Outline Package, Flat Lead	SOPFL + Pin Qty. + P Pitch _ + Lead Span X Body Height + L Lead Length X Width
Inductors, Chip	INDC + Body Length X Width X Height + L Lead Length
Inductors, Chip, Array, Concave	INDCAV + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Inductors, Chip, Array, Flat	INDCAF + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Inductors, Dual Flat No-lead	INDDFN + Body Length X Width X Height + L Lead Length X Width
Inductors, Molded	INDM + Lead Span X Body Width X Height + L Lead Length X Width
Inductors, Precision, Molded	INDPM + Lead Span X Body Width X Height + L Lead Length X Width
Inductors, Side Concave	INDSC + Body Length X Height + L Lead Length X Width
Integrated Circuit, Small Outline, Flat Lead, 3 - 6 pin	ICSOFL + Pin Qty. + P Pitch _ + Lead Span X Body Height + L Lead Length X Width
Land Grid Array, Circular Lead	LGA + Pin Qty. + C + P Pitch _ Pin Columns X Pin Rows _ Body Length X Width X Height + L Lead Diameter
Land Grid Array, Square Lead	LGA + Pin Qty. + S + P Pitch _ Pin Columns X Pin Rows _ Body Length X Width X Height + L Lead Size
LED’s, Chip	LEDC + Body Length + Width X Height + L Lead Length
LED’s, Dual Flat No-lead	LEDDFN + Body Length X Width X Height + L Lead Length X Width
LED’s, Molded	LEDM + Lead Span X Body Width X Height + L Lead Length X Width
LED’s, Side Concave	LEDSC + Body Length X Height + L Lead Length X Width
LED’s, Side Concave, 4 Pin	LEDSC4 + P Pitch _ Body Length X Height + L Lead Length X Width
Oscillators, Dual Flat No-Lead (4-pin)	OSCDFN4 _ Body Length X Width X Height + L Lead Length X Width
Oscillators, Side Concave	OSCSC + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Oscillators, Side Flat	OSCSF + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Oscillators, J-Lead	OSCJ + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Width
Oscillators, L-Bend Lead	OSCL + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Oscillators, Corner Concave	OSCCC + Body Length X Width X Height + L Lead Length X Width
Plastic Leaded Chip Carriers	PLCC + Pin Qty. + P Pitch _ Lead Span L1 X Lead Span L2 Nominal X Height + L Lead Width
Plastic Leaded Chip Carrier Sockets Square	PLCCS + Pin Qty. + P Pitch _ Lead Span L1 X Lead Span L2 Nominal X Height + L Lead Width
Pull-back Small Outline No-lead	PSON + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width + T Thermal Pad Length X Width
Pull-back Quad Flat No-lead	PQFN + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width + T Thermal Pad Length X Width
Quad Flat Packages	QFP + Pin Qty. + P Pitch _ Lead Span L1 X Lead Span L2 Nominal X Height + L Lead Length X Width + T Thermal Pad Length X Width
Ceramic Quad Flat Packages	CQFP + Pin Qty. + P Pitch _ Lead Span L1 X Lead Span L2 Nominal X Height + L Lead Length X Width
Quad Flat No-lead	QFN + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width + T Thermal Pad Length X Width
Quad Leadless Ceramic Chip Carriers	LCC + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Quad Leadless Ceramic Chip Carriers (Pin 1 on Side)	LCCS + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Chip	RESC + Body Length X Width X Height + L Lead Width
Resistors, Chip, Array, Concave	RESCAV + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Chip, Array, Convex, E-Version (Even Pin Size)	RESCAXE + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Chip, Array, Convex, S-Version (Side Pins Diff)	RESCAXS + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Chip, Array, Flat	RESCAF + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Dual Flat No-lead	RESDFN + Pin Qty. _ Body Length X Width X Height + L Lead Length X Width
Resistors, MELF	RESMELF + Body Length + Diameter + L Lead Width
Resistors, Molded	RESM + Lead Span X Body Width X Height + L Lead Length X Width
Resistors, Side Concave	RESSC + Body Length X Width X Height + L Lead Length X Width
Small Outline IC, J-Leaded	SOJ + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Small Outline IC, L-Leaded	SOL + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Small Outline Integrated Circuit, (50 mil Pitch SOIC)	SOIC + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Small Outline Packages	SOP + Pin Qty. + P Pitch _ Body Length X Lead Span X Body Height + L Lead Length X Width + T Thermal Pad Length X Width
Small Outline No-lead	SON + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width + T Thermal Pad Length X Width
Small Outline Diode	SOD + Lead Span X Body Width X Height + L Lead Length X Width
SOT143	SOT143 + P Pitch _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT223	SOT223 + Pin Qty. + P Pitch _ Body Length X Lead Span X Body Height + L Lead Length X Width
Thermistors, Chip	THRMC + Body Length + Width X Height + L Lead Width
Transistors, Small Outline, Flat Lead, 3 - 6 pin	TRXSOFL + Pin Qty. + P Pitch _ + Lead Span X Body Length X Body Height + L Lead Length X Width
Transistors, Dual Flat No-lead	TRXDFN + Pin Qty. _ Body Length X Body Width X Height + L Lead Length X Width
Varistors, Chip	VARC + Body Length X Width X Height + L Lead Width

SOT23 Form Factor Packages (EIA SOT & JEITA SC)

SOT23-3	SOT23-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC59-3	SC59-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT23-5	SOT23-5P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC59-5	SC59-5P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT23-6	SOT23-6P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC74	SC74-6P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT28	SOT28-8P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC70-8	SC70-8P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT323	SOT323-3P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC70	SC70-3P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT346	SOT346-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC59A	SC59-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT346T	SOT346T-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC96	SC96-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT353	SOT353 -5P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC88A	SC88A-5P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT363	SOT363-6P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC88	SC88-6P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT416	SOT416-3P50 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC75	SC75-3P50 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT753	SOT753 -5P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC74A	SC74A-5P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width

Note: All footprint dimensional values are Nominal except Height is Maximum

All dimensions are in Metric Units
All Lead Span and Height numbers go two places past the decimal point and "include" trailing Zero
All Lead Span and Body Sizes go two place before the decimal point and "remove" leading Zeros
All Chip Component Body Sizes are one place to each side of the decimal point
Pitch Values are two places to the right & left of decimal point with no leading Zeros but include trailing zeros

Land Pattern Naming Convention: Each land pattern in IPC-7351 is specified by a unique name that must convey the package family type, pin quantity, pin pitch, body length and width dimensions, terminal lead span, terminal lead length and width and thermal pad dimensions whenever applicable. Other fields in a land pattern name are optional and are discussed below.

The following notes provide guidance on using the tables above. Specific characters are reserved for use in the naming convention to denote or separate certain fields:

P : Prefixes pin pitch. For example, P80 specifies a 0.80 mm pitch between terminations.
L : Prefixes nominal lead dimensions
T : Prefixes thermal tab dimensions
X : Dimension separator. For example, 0.80 mm by 1.50 mm is denoted 80X150
C, N : Denote Collapsing and Non-collapsing balls respectively when specifying a BGA land pattern
_ : Underscore is a field separator between pin quantity and/or pin pitch and the package body dimensions
- : Dash is a field separator between pin quantity in hidden and deleted pin components
+ : Plus denotes "in addition to". The plus "+" symbol does not actually appear in the land pattern name, it is only used to assist in reading the information.

Additional notes:

All dimensions are metric units
All dimensions are nominal except height is maximum
All numeric values are two places before and after the decimal point and "remove" leading Zeros
If there is no pin quantity in the Land Pattern Name it is assumed that the pin quantity is 2
Thermal Tabs are included in the Pin Quantity

Additional and Optional Fields:

The suffix letters "L", "M", and "N" are used to signify when the land protrusion is at their minimum (least), maximum (most), or median (nominal) protrusion and appear as the last character. The 3 Density Levels are defined as follows:

M = Maximum (Most) Material Condition (Density Level A)
N = Median (Nominal) Material Condition (Density Level B)
L = Minimum (Least) Material Condition (Density Level C)

If no Density Level suffix is provided, then the land pattern either follows the component manufacturer's recommended pattern or a custom land pattern for use with multiple component manufacturer’s packages in the same component family.

Additional suffices for JEDEC Standard parts that have several alternate packages are as follows:

AA, AB, AC JEDEC Component Identifier (used primarily on Semiconductor packages).

Additional suffixes for alternate components that do not follow the JEDEC standard are as follows (these are located before the Density Level suffix):

"A" - Alternate Component letter is used when component package nominal dimensions are the same for two packages but the package tolerances are different enough to create a unique land pattern to avoid land pattern name duplication.

Ball Grid Array (BGA) packages may require land pattern names that indicate a difference in pitch between balls in the rows vs. balls in the columns. These are often referred to as a “dual pitch BGA”. For example, the BGA land pattern name of BGA48C80X100P6X8_900X1200X120 conveys that the pitch 0.80 mm between columns and 0.10 mm between rows.

Note: In this example, Pin A1 is assumed to be located in the Lower left when viewing the package from the top view. A 90 rotation of the BGA swaps the definition of Rows and Columns.

A pin order or pin quantity modifier shall be added to the component package type specification to convey reverse pin ordering, hidden pins, or deleted pins.

SOP20R: 20 pin part, Reverse Pin Order
SOT143R: Reverse Pin Order
SOP20-24: 20 pin part in a 24 pin package. The pins are numbered 1 – 24 the hidden pins are skipped over. The schematic symbol displays up to 24 pins.
SOP24-20: 20 pin part in a 24 pin package. The pins are numbered 1 – 20 the deleted pins are removed. The schematic symbol displays 20 pins.

Land Pattern Naming for Non-conforming Packages: A large number of component packages are unique, non-standard packages or unique connectors. These component packages do not fit into a standard land pattern name due to their unique features. Therefore, in order to have a single land pat tern naming convention that covers every component package in the electronics industry, the land pattern name must be associated with the component manufacturer and their part number or case code as shown below:

ManufacturerNameAbbreviation_ManufacturerPartNumber or

ManufacturerNameAbbreviation_ManufacturerCaseCode

All special characters used in the part number will be replaced with a hyphen "-" except periods "." will be replaced with an underscore "_".

If the component package or connector is unique and has a single manufacturer part number, then Part Number would be used to generate the Land Pattern Name

The component is a standard package and is associated with multiple manufacturer part numbers then manufacturer Case Code would be used to generate the Land Pattern Name

Examples:

FOXCONN_JFM38U1A-2PVT-4F TI_RKG41 CK_CRD16CM0SB

MOLEX_67503-1020 MAXIM_L1053-H2 ABRACON_ABM11

SAMTEC_QTH-060-01-L-D-A CUI_SJ-3566AN AMPHENOL_101-00565-64

For reference, various unique footprints are shown below that are non-conforming with Tables above.

This is the footprint of SAMTEC_QTH-060-01-L-D-A, an connector with plated mounting and non-plated alignment holes.

PCB Libraries Guideline : Courtyard Excess

Sat, 15 Aug 2026 11:00:49 +0000

Author: Nick B
Subject: Courtyard Excess
Posted: 15 Aug 2026 at 11:00am

In PCB design, courtyard excess refers to the specific clearance area between the combined physical boundary of a component (body and pads) and the outer boundary of its placement courtyard. This buffer zone ensures that components have sufficient space for manufacturing tolerances, mechanical assembly, and potential rework without interfering with neighboring parts.

Courtyards should not overlap in the part placement. Courtyards are used in a variety of ways in different CAD tools. The courtyard excess values are defined in the 3-Tier density levels for surface mount components.

Least Density Level: 0.10 mm
Nominal Density Level: 0.20 mm
Most Density Level: 0.40 mm

The default courtyard outline maps to the pads and the Maximum package body dimensions. Mapping the courtyard outline to Maximum package body dimensions is affected by package tolerances. Package tolerances vary between component manufacturers affecting the resulting courtyard excess value. There is a Drafting Option switch to change the courtyard outline to map to the Nominal package body. Using Nominal package body is not affected by package tolerances and provides a consistent courtyard excess for all footprints regardless of the package tolerance values. IPC-7352 only recommends mapping to the Maximum package dimensions, but industry consensus is leaning toward using Nominal package dimensions because component manufacturer tolerances are sometimes too robust and unrealistic.

For through-hole component footprints, the courtyard excess is set to a single value because through-hole technology only has a single density level. The typical through-hole courtyard excess is 0.25 mm.

Requirements for Special Component Types

While generic components follow standard density levels, certain parts require larger excess values due to their physical height or specialized assembly needs:

BGA/WLCSP Devices: Typically require a 1.00 mm clearance to allow for optical inspection of balls and specialized rework heat application.
Connectors: Recommended excess is often 0.50 mm to account for mating plug clearances and physical handling during insertion.
Tall Components: Canned capacitors and crystals often utilize a 0.50 mm excess to prevent tall bodies from shadowing or obstructing the placement of adjacent parts.
Large Non-Standard Packages: For parts with any dimension over 10 mm, an excess of 0.50 mm is often recommended to accommodate bulky rework equipment.

Why Courtyard Excess is Critical

Manufacturing Tolerances: Accounts for registration errors during board fabrication and pick-and-place machine accuracy.
Rework Accessibility: Provides enough room for tweezers, vacuum nozzles, or soldering iron tips to extract and replace a defective component without damaging neighbors.
Collision Prevention: Ensures that the 3D bodies of components do not clash during automated assembly.
Solder Joint Inspection: Allows sufficient visual or automated optical inspection (AOI) access to the solder fillets.

The courtyard excess for component body and footprint pads can be independently adjusted. The main reason for 2 different settings is because the physical package can move in any direction during reflow oven, but the pads never move. Typically, the courtyard to body and courtyard to pad are set to the same value for symmetry, but they can be adjusted to the individual user.

There is also a manufacturing allowance provided by the assembly shop as a courtyard-to-courtyard clearance rule. In the average case, courtyards can be bumped next to each other. But the assembly shop may provide a spacing rule between courtyards, and this is referred to as the manufacturing zone.

The original courtyard shape in IPC-SM-782 was rectangular. The contour courtyard was introduced in the IPC-7351 guideline. The Footprint Expert can automatically switch between either courtyard outline shape, and rebuild your entire library with whatever you choose.

PCB Libraries Guideline : Through-hole Terminals

Sat, 15 Aug 2026 11:00:50 +0000

Author: Nick B
Subject: Through-hole Terminals
Posted: 15 Aug 2026 at 11:00am

A through hole pad stack is a set of Printed Circuit Board features that define a plated or non-plated, drilled hole that: 1. accommodates a component terminal lead; 2. Provides or prevents a connective path between layered circuitry; or both.

Elements of a Through-hole Pad Stack

Pad on Assembly Layer

This is a unique, user selectable pad stack option in that it is defined as a Component option.

When Outline is selected, graphics, created from the Top and Bottom pads, are added as drawing line elements on the respective footprint Assembly Layers.

When Filled is selected, regular filled pads are added to the terminal pad stack on the Top and Bottom Assembly layers.

Footprint Expert Options for Through-hole Pad Stacks

Solder and Paste Mask Excess

The Solder Mask Excess option sets the size of the solder mask pad relative to the top or bottom pads, respectively. The value is expressed as either over (pad plus excess) or under (pad minus excess).

Paste Mask, when applied to through-hole pad stacks and referred to as "Pin-in-Paste", is an advanced soldering technique that integrates through-hole and surface mount components in a single reflow pass. This method involves depositing solder paste inside through-hole vias and pads before component placement, allowing for soldering through-hole pins and the PCB in one step. Paste mask size is typically smaller than their associated and expressed as percentage of its associated pad size.

Courtyard Clearance to Pad and Body

While these values appear as pad stack options, they don’t appear anywhere as physical features in the pad stack itself. Their effect is only noticeable in the courtyard outline spacing surrounding the footprint. A value of zero applied to either option results in a courtyard with no clearance to that option.

Hole Excess over Lead

There are two possible value choices for this option. Hole Excess to Round or Excess to Square/Rectangular leads.

The excess value sets a round hole diameter equal to the round lead diameter or the square/rectangular lead diagonal, plus the specified hole over lead clearance.

Example: square lead = 0.50; lead diagonal = 0.707;

hole over lead = 0.15; hole diameter = 0.707 + 0.15 = 0.857.

Hole Size Round To Nearest

This option is applied the result of the hole calculation to force a finished hole value to be rounded up so as to be evenly divisible by this value. Setting this value to zero will allow a hole size to round off to the Design Options units decimal place setting.

Example: round 0.857 up to the nearest 0.05 = 0.90.

Annular Ring

The Annular Ring is a pad with an inner diameter that maintains a clearance to a plated or non-plated hole. It is defined by two values: a pad outer diameter (or length and width) and a uniform excess spacing of the inner pad dimensions to the hole perimeter.

Pad-To-Hole and Slot Ratios

Optional ratios can be applied to pad stack calculations that provide an additional robustness that grows in proportion to the hole or slot size.

In practice, the pad size is initially derived as ratio to the hole size then other settings (such as Minimum Annular Ring, etc.) can be applied as required.

The effect of ratios on pad size is illustrated below. Hole and slot sizes shown are equal and all other through-hole option settings are the same.

Example (round hole and pad):

Hole = 0.70; Pad = Hole x Ratio = 0.70 x 1.5 = 1.05.

Pad Size Round-To-Nearest

This option is applied to the result of the pad calculation to force a finished pad value to be rounded off so as to be evenly divisible by this value. Setting this value to zero will allow a pad size to round off to the Design Options units decimal place setting.

Example: round 1.05 up to the nearest 0.1 = 1.10.

Thermal Relief

A Thermal relief, also called a thermal pad, is a pattern of copper strips, or ‘spokes’ connecting a PCB pad, across a void, to a large copper area, such as a ground or power plane. Unlike a solid connection, a thermal relief limits heat transfer, preventing the copper plane from acting as a heat sink that could result in a ‘cold’ solder joint.

Thermal Relief Options

Thermal ID Excess Over Hole

Defines the conductive clad space between the hole and the thermal void inner diameter.

Thermal OD Excess Over Thermal ID

Determines the size of the non-conductive void between the inner clad and outer plane.

Thermal OD and Thermal OD-to-Hole Ratio

Thermal Outer Diameter is the extent of the Thermal Pad Stack Layer and calculated as:

Thermal ID Over Hole + Thermal OD Over ID + (Hole x Ratio).

Example: Thermal OD = 0.40 + 0.30 + (0.70 x 1.1) = 1.47.

Anti-pad

An Anti-pad is a design feature that creates a plane clearance area around a plated or non-plated through-hole. The anti-pad void serves to avoid unintended connections between vias, traces and layers; improve solderability and reduce thermal stress during the assembly process. In Footprint Expert, the Anti-pad is calculated to equal Thermal OD.

Thermal Spoke Width

Width is calculated as:

Spoke Width = Spoke Width % x (Thermal OD / 4),

Example: Spoke Width = 0.75 x (1.47 / 4) = 0.28

Wave Placement Keep-out Excess Over Pad

A wave placement keep-out is a non-routable region on the bottom of a PC board that prevents solder from flowing into certain areas, such as component pads, mounting holes, fiducials or high-voltage zones during a wave soldering process.

The size of a Wave Placement Keep-out is completely up to the footprint designer based on a component’s application. The size is simply defined as an excess to be added to the bottom pad.

PCB Libraries Guideline : Manufacturer Recommended Patterns

Sat, 15 Aug 2026 11:00:51 +0000

Author: Nick B
Subject: Manufacturer Recommended Patterns
Posted: 15 Aug 2026 at 11:00am

All non-standard packages must use the recommended manufacturer pattern.

The misconception that simply using the manufacturer recommended pattern will keep you safe is enough to get you in serious trouble, and over time, create mayhem in your CAD library. You need much more than the recommended pattern for a reliable PCB design!

Most component manufacturers provide recommended solder patterns in their datasheets, but there are two major issues you need to consider:

What rules were used to calculate the mfr. recommended solder pattern, and are they consistent across your library of parts for different manufacturers?
Since manufacturers provide no drafting outline data, how are you consistently creating these and applying them throughout your library over time?
Did the component manufacturer create reference PC boards and run them through stress tests to check their solder joint goals against the IPC J-STD-001 standard?
Component manufacturer recommended patterns are typically designed using nominal package dimensions; does the recommended pattern also accommodate the minimum and maximum material condition of the package tolerances specified in their datasheet?

Here is a representation of a Manufacturer Recommended Pattern with rounded rectangle pad shape. All component manufacturers (except Texas Instruments) recommended rectangle pad shape. However, paste mask stencil apertures are laser cut with rounded corners.

This is obviously missing the six critical drafting outlines. Traditionally, these have been manually created with a plethora of inconsistent rules that get adjusted over time:

Silkscreen
Assembly
Courtyard
Origin
Component
Terminals

It takes more time to manually add all the necessary Drafting Outlines than it does to create the Manufacturer Recommended Pattern, and these are just as important as the pattern itself!

All drafting outline widths and spacings are defined in your personal master Options file. This guarantees consistent quality throughout your entire CAD library. You can also turn off any drafting outline that you do not want in your CAD library, but easily “bring it back” if you decide later that you need it!

This is your end goal, read on for details how to reach it:

The Component Outline is crucial for accurate assembly placement and helps ensure your components fit properly on the board. It helps with verification during visual inspections, and facilitates repair, rework, and future updates to the design.

The Terminal Outlines are likewise critically important. They represent where on the metal terminal leads the physical package makes contact to the PCB. These are essential for reliable soldering and proper electrical connectivity. Each terminal lead outline must be entirely located on a pad. If the pad is not 100% on a metalized terminal outline, then the manufacturer’s recommended pattern is not good, and you will get a bad solder connection.

The Silkscreen Outline enables proper component orientation and should be created so that it’s visible after assembly. Silkscreen outlines should not be placed under the package body – they are useless there and could potentially lift low profile or micro-miniature components off the PCB surface resulting in poor solder joints. The silkscreen data includes a post assembly inspection dot located by Pin 1, which helps with final assembly inspection.

The Assembly Outline is a closed polygon. A chamfered corner is located by Pin 1 if the component is polarized or cannot be inverted during assembly. The assembly outline is important because it provides clear reference points for automated pick-and-place machines. A well-defined Assembly Outline also facilitates design verification and quality control.

The Courtyard Outline is extremely important in defining the required minimum clearance area required for a component, ensuring there is no interference with neighboring components during assembly or operation. The ideal shape is contoured around the package body and pads, which is the default setting in the Footprint Expert. The courtyard excess value for Package Body and Pads can be set separately.

The Origin Outlines are placed on an independent layer. The size & outline width are user definable. Accuracy is essential for accurate alignment because it serves as a reference for positioning the component on the PCB. A precise origin simplifies machine programming and enhances design portability across tools.

Datasheet dimensional tolerances are usually a conservative envelope rather than the real production distribution. If/when measurement data shows the parts are tightly controlled – Six Sigma quality levels – designing footprint geometry using nominal dimensions instead of worst-case maximum material condition can give us a reliable solder joint and provide space for routing. Having real measurement distribution data could support a change toward using nominal measurements.

For standard components, we can round the corners of any rectangular pads with a ~0.05 mm corner radius. This eases routing with little to no reliability trade-off, and on tight-pitch QFNs it buys extra corner clearance, which reduces the chance of solder mask slivers. If the manufacturer's QFN pads are a D-shape/finger shape with a full round on the heel side nearest the EPAD, match that shape for the same reason – there is very little downside, and it helps corner clearance.

Footprint Expert can output the terminal outlines and show where the physical part lands on the pads. Adding a 3D model to visually confirm footprint-to-component compatibility is also very helpful – Footprint Expert generates both the footprint and the 3D model for standard packages on the same origin and orientation. For non-standard parts, finding the most detailed manufacturer model available and stacking it against the pattern in CAD is another check I'd recommend.

A few package types genuinely benefit from following the manufacturer's recommendation.

Example: Texas Instruments (TI) provides highly detailed recommended patterns for every Case Code they develop. Their pad stack patterns are almost predicable because they use the same terminal lead width and length for each pin pitch for each component family. TI provides solder mask data that always has a solder mask web between the pads. It’s as if they created their terminal lead widths intentionally to avoid gang masking rows of pins. The paste mask apertures for thermal pads always have a 0.20 mm aperture gap, a 0.05 mm corner radius on every aperture and they provide 80% paste mask coverage. They recommend a 0.05 mm corner radius on every pad stack while most component manufacturers recommend a rectangular pad shape and no solder or paste mask recommendations. TI is one of the most organized component manufacturers with consistent quality. Their Case Code packages are used by multiple part numbers, and many TI Case Codes are assigned to thousands of part numbers.

Thermal-Pad Paste Mask: Manufacturers typically recommend a paste pattern other than 1:1 with the metallized area, because excessive paste floats and rotates the part during reflow, risking pin-to-pin shorting and open perimeter joints. IPC-7093 covers the windowpane/array aperture with coverage commonly in the ~50–80% range. Footprint Expert hits the coverage target through the options file, which saves hand-drawing each paste block.

Tight-tolerance Guide Pins or Press-Fit Pins: Go with the manufacturer's recommendation. Guide pins and press-fit finished-hole size and tolerance are manufacturer-specific (compliant-pin design) and should come straight from their drawing.

High-Power Pads: The recommended pad may be larger than the calculated one to add heat dissipation and reduce thermal-cycling fatigue. Here we can solder mask-define the pad: the copper layer uses the manufacturer's larger recommended size for heat spreading and mechanical robustness, and the solder mask opening uses the Footprint Expert-calculated land, since the mask edge is what defines the solderable area.

High-Voltage Applications: The recommended pads may be spaced further apart than the Footprint Expert lands. Use IPC-2221B to confirm the pattern is acceptable for the given voltage.

RF Components: Follow the manufacturer's recommendation as closely as possible. These almost always ship with an evaluation board demonstrating tested performance across the listed parameter range, which is a reliable starting point. RF engineers typically begin from that recommendation and modify based on bench data or EM simulation for their specific needs.

Die Components: Also, a case to follow the manufacturer closely – though these often have no recommendation. Working with die means an advanced process/fab house by definition, so we can build the pad stack 1:1 with the die-bump metallization with no solder mask expansion, use the CAD tool's layer capabilities to assign double-sided features that must count electrically in the schematic, and define plated or non-plated contours for cavity-mounted applications.

PCB Libraries Guideline : Solder Joint Goal Tables for Nominal Calculation

Sat, 15 Aug 2026 11:00:52 +0000

Author: Nick B
Subject: Solder Joint Goal Tables for Nominal Calculation
Posted: 15 Aug 2026 at 11:00am

The Nominal Calculation section was inspired by the FED Vol 18 – The New Proportional Land Dimensioning Concepts. For more details, see Appendix I.

Gullwing Leads (SOP, QFP, SOT, DPAK, SOD)

Rectangular and Square-End Cap (Chips)

Inward L Lead Oscillator and Small Outline L-Lead (SOL)

Outward L-Lead (SOT)

Cylindrical End Cap (MELF)

Small Outline No-Lead (SON, QFN)

Small Outline Components, Flat Lead (SOFL, SODFL)

Flat Lug Lead (DPAK)

Small Outline Flat No-Lead Bottom (DFN, LGA, PSON, PQFN)

Under-Body Outward L-Lead (Aluminum Electrolytic Capacitor, Crystal)

Inward Flat Ribbon L-Lead (Molded Body)

Concave & Convex Chip Array and Leadless Chip Carrier (LCC)

J-Leads

Column and Land Grid Array (CGA & LGA)

Corner Concave Oscillator

Collapsing and Non-Collapsing Ball Grid Array (BGA)

PCB Libraries Guideline : Surface Mount Solder Joint Goal Tables (Min / Max)

Sat, 15 Aug 2026 11:00:53 +0000

Author: Nick B
Subject: Surface Mount Solder Joint Goal Tables (Min / Max)
Posted: 15 Aug 2026 at 11:00am

The Min/Max Calculation section was originally inspired by IPC-7351 and subsequently by the superseding IPC-7352 – Generic Guideline for Land Pattern Design. The solder joint goals were derived from the IPC J-STD-001G - Requirements for Soldered Electrical and Electronic Assemblies. For more details, see Appendix I.

Gullwing Leads (SOP, QFP, SOT, DPAK, SOD)

Rectangular and Square-End Cap (Chips)

Inward L Lead Oscillator and Small Outline L-Lead (SOL)

Outward L-Lead (SOT)

Cylindrical End Cap (MELF)

Small Outline No-Lead (SON, QFN)

Small Outline Components, Flat Lead (SOFL, SODFL)

Flat Lug Lead (DPAK)

Small Outline Flat No-Lead Bottom (DFN, LGA, PSON, PQFN)

Under-Body Outward L-Lead (Aluminum Electrolytic Capacitor, Crystal)

Inward Flat Ribbon L-Lead (Molded Body)

Concave & Convex Chip Array and Leadless Chip Carrier (LCC)

J-Leads

Column and Land Grid Array (CGA & LGA)

Corner Concave Oscillator

Collapsing and Non-Collapsing Ball Grid Array (BGA)

PCB Libraries Guideline : IPC-7352 Mathematical Model

Sat, 15 Aug 2026 11:00:54 +0000

Author: Nick B
Subject: IPC-7352 Mathematical Model
Posted: 15 Aug 2026 at 11:00am

The IPC-7352 standard defines the mathematical model for creating reliable surface mount (SMD) PCB footprints by providing formulas to calculate pad width (X), pad spacing (G), and pad span (Z), based on component dimensions, solder fillet goals, and manufacturing tolerances.

The following images illustrate potential pad and terminal relationships under various Material Conditions – Minimum, Nominal, and Maximum.

The Nominal Material condition of the component package & Nominal Terminal.
The Minimum Material condition of the component package & Nominal Terminal.
The Maximum Material condition of the component package & Nominal Terminal.
The Minimum Material condition of the component package & Minimum Terminal.
The Maximum Material condition of the component package & Maximum Terminal.

The resulting pad stack must have terminal leads on the pad stack regardless of every possible Material Condition possible to pass assembly inspection and meet the requirements set forth in the IPC J-STD-001 Standard and the IPC-7352 Guideline.

i.e.: regardless of the Component Package and Terminal Lead Material Condition, the Terminal Lead must never be exposed outside the calculated pad stack.

Note: most component packages are created in the Nominal Material Conditions. The package tolerances play a key role in the resulting pad stack.
Nominal Package Dimensions & no Package Tolerances.

The Footprint Expert uses the IPC-7352 Mathematical Model.

For details, see IPC-7352.