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  <pubDate>Thu, 21 May 2026 12:15:30 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : Inward L-Bend Terminal Leads for Pad Length]]></title>
   <link>https://www.PCBLibraries.com/forum/inward-lbend-terminal-leads-for-pad-length_topic3646_post14541.html#14541</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> Inward L-Bend Terminal Leads for Pad Length<br /><strong>Posted:</strong> 21 May 2026 at 11:37am<br /><br />The Inward L-Bend is similar to the J-Lead component family but with flat leads that bend inward.&nbsp;<div><br></div><div>The E2 dimension is to the center of the terminal leads. You may have to do some math to figure that out.&nbsp;</div><div><br></div><div>This component family and terminal lead are in the new Footprint Expert Guideline which will be released next week.&nbsp;</div><div><br></div>]]>
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   <pubDate>Thu, 21 May 2026 11:37:51 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : Inward L-Bend Terminal Leads for Pad Length]]></title>
   <link>https://www.PCBLibraries.com/forum/inward-lbend-terminal-leads-for-pad-length_topic3646_post14539.html#14539</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=12058">ransonjd</a><br /><strong>Subject:</strong> Inward L-Bend Terminal Leads for Pad Length<br /><strong>Posted:</strong> 21 May 2026 at 10:48am<br /><br />What is used to calculate the pad length on parts with inward bent leads?&nbsp;<div><br></div><div>(J-Lead, L-lead, PLCC, etc.)&nbsp;</div><div><br></div><div>As far as I can see, the software doesn't provide a field for the measurement of the inward extent of the leads on these parts. (Like L on SOPs, but inward.)<div><br></div><div><div>Additionally, what is E2 supposed to measure on an L-lead part?</div><div><br></div><div>Thanks!</div></div></div>]]>
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   <pubDate>Thu, 21 May 2026 10:48:19 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : Collapsing vs: Non-Collapsing BGA Balls]]></title>
   <link>https://www.PCBLibraries.com/forum/collapsing-vs-noncollapsing-bga-balls_topic1868_post14531.html#14531</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> Collapsing vs: Non-Collapsing BGA Balls<br /><strong>Posted:</strong> 12 May 2026 at 8:01am<br /><br />The Non-Collapsing BGA calculator is used on fine pitch parts when you can't fanout all the pins in the PCB layout and you're only fanout option is via-in-pad.&nbsp;<div><br></div><div>Non-Collapsing BGA pads are bigger then collapsing BGA pads to allow an annular ring for the drilling process.&nbsp;</div><div><br></div><div>Also, if you need to solder mask define the BGA pad to pass drop tests, the solder mask will help with the pad attachment to the prepreg. During drop tests, the ball to pad joint will withstand a drop test, but a non solder mask defined pad could rip away from the prepreg causing the device to malfunction.&nbsp;</div><div><br></div><div><br></div>]]>
   </description>
   <pubDate>Tue, 12 May 2026 08:01:54 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : Collapsing vs: Non-Collapsing BGA Balls]]></title>
   <link>https://www.PCBLibraries.com/forum/collapsing-vs-noncollapsing-bga-balls_topic1868_post14530.html#14530</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=11979">m.elsayed</a><br /><strong>Subject:</strong> Collapsing vs: Non-Collapsing BGA Balls<br /><strong>Posted:</strong> 11 May 2026 at 8:29pm<br /><br />Is the information on collapsing or non collapsing be mentioned in supplier datasheets?<div><br></div><div>Or does it just depend on the pin pitch value only?</div><div><br></div><div>Also is the pitch value found in IPC-7352 standard?</div><div><br></div>]]>
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   <pubDate>Mon, 11 May 2026 20:29:25 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : Master Options File or CAD Tool Translator Issue]]></title>
   <link>https://www.PCBLibraries.com/forum/master-options-file-or-cad-tool-translator-issue_topic3637_post14512.html#14512</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=1">Nick B</a><br /><strong>Subject:</strong> Master Options File or CAD Tool Translator Issue<br /><strong>Posted:</strong> 16 Apr 2026 at 5:24pm<br /><br />If you experience one of these issues:<div><ol><li>Footprint Expert installation is overwriting your Master Options file, or</li><li>CAD tool translator is not working correctly</li></ol><div>It is probably because you are using the same OPT options file as both your "CAD tool translator" OPT file and "Master Options" file. These two are separate files. As a matter of fact, there are <b>three</b> OPT option files:</div><div><br></div><div><br></div><div><b>1. Console Options</b> - edit in Tools &gt; Options</div><div><img src="uploads/1/OPT-Issue1.png" height="236" width="485" border="0" /><br></div><div><b><br>2. Master Options</b> - edit in Tools&nbsp; &gt; Options</div></div><div><img src="uploads/1/OPT-Issue2.png" height="229" width="219" border="0" /><br></div><div><b><br>3. CAD Tool Options</b> - edit in the "Build Footprint" window</div><div><img src="uploads/1/OPT-Issue3.png" height="280" width="464" border="0" /><br></div>]]>
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   <pubDate>Thu, 16 Apr 2026 17:24:43 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : How To Choose the Footprint for SMD Chip Resistor]]></title>
   <link>https://www.PCBLibraries.com/forum/how-to-choose-the-footprint-for-smd-chip-resistor_topic3630_post14492.html#14492</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> How To Choose the Footprint for SMD Chip Resistor<br /><strong>Posted:</strong> 23 Mar 2026 at 8:46am<br /><br />Here is the original EIA PDP-100 Chip Package dimensions and tolerances.&nbsp;<div><br></div><div><a href="https://www.pcblibraries.com/Forum/chips_topic3598.html%20" target="_blank" rel="nofollow">https://www.pcblibraries.com/Forum/chips_topic3598.html</a></div><div><br></div><div>Compare with IEC.</div><div><br></div>]]>
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   <pubDate>Mon, 23 Mar 2026 08:46:09 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : How To Choose the Footprint for SMD Chip Resistor]]></title>
   <link>https://www.PCBLibraries.com/forum/how-to-choose-the-footprint-for-smd-chip-resistor_topic3630_post14491.html#14491</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=19482">Ariel_Levy</a><br /><strong>Subject:</strong> How To Choose the Footprint for SMD Chip Resistor<br /><strong>Posted:</strong> 23 Mar 2026 at 12:58am<br /><br />Tom thank you very much&nbsp;<img src="https://www.pcblibraries.com/forum/smileys/smiley1.gif" border="0" alt="Smile" title="Smile" /><div>and thank you&nbsp;<span style="font-size: 13px; : rgb251, 251, 253;">Feynman</span><br><div><br></div><div>My difficulty is in obtaining information the thickness of the contacts size of the component (the size "T")</div><div>I bought the IPC-7351 and 7352. and you don't have information about this.</div><div>I think to buy&nbsp;EIA-JEP95 , and don't know it's worth the money if very MFG design is contacts size what "he" want's.</div><div><br></div><div>This table i found is accurate?</div><div><img src="uploads/19482/EIA_standard.jpg" height="200" width="347" border="0" /><br></div><div><br></div><div>How you handle this with&nbsp;general discrete components ,when the contacts size can be between 0.10 to 0.40?</div><div>With the IPC-7351 when contacts size is 0.4 mm?</div></div>]]>
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   <pubDate>Mon, 23 Mar 2026 00:58:01 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : How To Choose the Footprint for SMD Chip Resistor]]></title>
   <link>https://www.PCBLibraries.com/forum/how-to-choose-the-footprint-for-smd-chip-resistor_topic3630_post14490.html#14490</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=14683">feynman</a><br /><strong>Subject:</strong> How To Choose the Footprint for SMD Chip Resistor<br /><strong>Posted:</strong> 22 Mar 2026 at 10:14am<br /><br />Ask a/your assembler. They probably assembled millions of parts and are probably the best source for a reliable footprint.]]>
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   <pubDate>Sun, 22 Mar 2026 10:14:58 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : How To Choose the Footprint for SMD Chip Resistor]]></title>
   <link>https://www.PCBLibraries.com/forum/how-to-choose-the-footprint-for-smd-chip-resistor_topic3630_post14489.html#14489</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> How To Choose the Footprint for SMD Chip Resistor<br /><strong>Posted:</strong> 22 Mar 2026 at 8:14am<br /><br />IPC-7351 uses Min/Max Mode technology. the resulting footprint takes into consideration the package tolerances to calculate the pad stacks. The solder pattern should accommodate the package in the minimum, nominal and maximum material condition.&nbsp;<div><br></div><div>The average 0402 tolerance range is +/-0.05 to +/-0.10.&nbsp;</div><div><br></div><div>It seems like component manufacturers use their nominal package dimensions and add a Toe, Heel and Side. They use Nominal Mode technology and ignore the tolerances they provide in their datasheets.&nbsp;</div><div><br></div><div>The average dimensions on an 0402 are L=1.00, W=0.50, T=0.25.&nbsp;</div><div><br></div><div>Your pad stack pattern will depend on what dimensions and tolerances you use.&nbsp;</div><div><br></div><div>However, if you run into a 0402 chip manufacturer that has tolerances greater than 0.10, I would highly question the accuracy of their machine process.&nbsp;</div><div><br></div><div>Ideally, manufacturers try to produce packages that are Nominal Material Condition. That's the goal. Maybe in the future package tolerances will be 0.00 and then the Nominal Mode technology will take over and the IPC-7351 mathematical model will be history.&nbsp;</div><div><br></div>]]>
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   <pubDate>Sun, 22 Mar 2026 08:14:56 +0000</pubDate>
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   <title><![CDATA[Questions &amp; Answers : How To Choose the Footprint for SMD Chip Resistor]]></title>
   <link>https://www.PCBLibraries.com/forum/how-to-choose-the-footprint-for-smd-chip-resistor_topic3630_post14488.html#14488</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=19482">Ariel_Levy</a><br /><strong>Subject:</strong> How To Choose the Footprint for SMD Chip Resistor<br /><strong>Posted:</strong> 22 Mar 2026 at 5:07am<br /><br /><p ="ms&#111;normal"=""><span lang="EN-US">How do you choosethe footprint for SMD Resistor case 0402?<o:p></o:p></span></p><p ="ms&#111;normal"=""><span lang="EN-US">Vishay have3 recommendations for footprints.<o:p></o:p></span></p><p ="ms&#111;normal"=""><span lang="EN-US">Yageo onerecommended but it’s different from Vishay.</span></p><p ="ms&#111;normal"=""><span lang="EN-US"><b>Vishay recommendation:</b></span></p><p ="ms&#111;normal"=""><span lang="EN-US">L=0.50 A=0.40 B=0.60</span></p><p ="ms&#111;normal"=""><span lang="EN-US"><b>BASED ONIPC-7351</b><o:p></o:p></span></p><p ="ms&#111;normal"=""><span lang="EN-US">L=0.40 A=0.55B=0.60</span></p><p ="ms&#111;normal"=""><b>BASED ON IEC 61188-6-2</b><span lang="EN-US"><o:p></o:p></span></p><p ="ms&#111;normal"=""><span lang="EN-US">L=0.55 A=0.35B=0.55</span></p><p ="ms&#111;normal"=""><span lang="EN-US"><b>Yageo</b><o:p></o:p></span></p><p ="ms&#111;normal"=""><span lang="EN-US">L=0.50 A=0.50 B=0.60<o:p></o:p></span></p><p ="ms&#111;normal"=""><span lang="EN-US">&nbsp;<img src="uploads/19482/0402_footprint.jpg" height="278" width="413" border="0" /></span></p><p ="ms&#111;normal"="">I am very confused by all the recommendations.</p><p ="ms&#111;normal"=""><span lang="EN-US"></span></p><p ="ms&#111;normal"="">I would appreciate a suggestion or any guidance on how to choose a footprint.</p><p ="ms&#111;normal"=""><br></p>]]>
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   <pubDate>Sun, 22 Mar 2026 05:07:04 +0000</pubDate>
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