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   <title><![CDATA[Drafting Outlines &amp; Polarity Marking : OverviewPCB drafting outlines...]]></title>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=1">Nick B</a><br /><strong>Subject:</strong> 3692<br /><strong>Posted:</strong> 20 Aug 2026 at 11:00am<br /><br /><div><div><b>Overview</b></div><div>PCB drafting outlines and polarity markings are critical for preventing component failure, rework, and assembly errors. Proper drafting requires clear component boundaries (silkscreen outlines), exact Pin-1 markers for ICs, and unambiguous anode/cathode (or positive/negative) indications for polarized devices.</div><div><br></div><div><b><font size="4">Silkscreen Drafting Options</font></b></div><div><img src="uploads/1/_Guideline-20.01-SilkscreenDraftingOpti&#111;ns.png" height="481" width="450" border="0" /><br></div><div><br></div><div><b>General</b>: Silkscreen is a non-conductive ink layer applied to provide visual guidance for assembly, testing, and maintenance.</div><div><br></div><div><b>Outline Width</b>: default settings can be changed to your company standard. Fabrication minimum silkscreen line width is 0.10. The nominal line width is 0.15 and maximum line width is 0.20 (but any value above 0.10 is acceptable).</div><div>Clearance to Pads: Defines the minimum allowable space between calculated silkscreen outlines and adjacent pads or applied to clearance between silkscreen articles. To avoid this violation lines may be terminated or trimmed. Polarity indicator placement may be adjusted.</div><div><img src="uploads/1/_Guideline-20.02-OutlineWidth.png" height="123" width="315" border="0" /><br></div><div><br></div><div><b>Map Outline to Body</b>: This drop-down menu sets the size of the silkscreen outline relative to the component body. The "Margin" option is applied in conjunction with the Outline to Body option. The default value is "Maximum".</div><div><img src="uploads/1/_Guideline-20.03-MapOutlineToBody.png" height="152" width="312" border="0" /><br></div><div><br></div><div><b>Outline To Body Margin</b>: Defines the silkscreen outline-to-nominal body spacing when "+Margin" is selected.</div><div><br></div><div><b>Offset Outline away from Body Outline</b>: When checked, the silkscreen size is offset by an additional ½ line width to minimize the chance of obscuration by a component body.<br><br></div><div><img src="uploads/1/_Guideline-20.04-OffsetOutlinefromBodyOutline.png" height="356" width="329" border="0" /></div><div><br><br></div><div><b>Minimize Silkscreen Ink</b>: When this option is checked, the Grid Array silkscreen outlines will be hatched. When it is unchecked, the silkscreen outline will be a full body outline.<br><br></div><div><img src="uploads/1/_Guideline-20.05-MinimizeSilkscreen.png" height="224" width="455" border="0" /><br><br><b>Allow Expanded Outline</b>: Allows expansion as required in order to add an outline to micro-miniature parts.</div><div><br></div><div><b>Error message when Expanded Outline Off</b>:</div><div><img src="uploads/1/_Guideline-20.06-ErrMsgExpandedOutlineOff.png" height="178" width="342" border="0" /><br><br><img src="uploads/1/_Guideline-20.07-ExpandedOutline.png" height="439" width="291" border="0" /></div><div><br><br><b>Pin 1 Markers General</b>: Markers are only added to parts having a polarity. For example, Diodes and polarized capacitors may have polarity, resistors and inductors do not have polarity and can be inverted during assembly.</div><div><br></div><div><b>Pin 1 Marker Size Not Larger/Not Smaller Than</b>: The silkscreen polarity dot size is automatically calculated to adjust to the component while maintaining a size within the range of these two values. Making the values equal results in a fixed dot size.</div><div><br><b>Add Pin 1 Marker to Footprint</b>: Enables or disables the automatic addition of polarity dot markers. Silkscreen polarity markers are placed to conform to the drafting settings and component physical constraints. If the automatic placement is found to be unacceptable, you can manually add Polarity Symbols.&nbsp;</div><div><img src="https://www.pcblibraries.com/forum/uploads/1/_Guideline-20.08a.png" height="208" width="201" border="0" /><br><br>When the pads are too short or under the package, a pin 1 dot at the end of the pad is acceptable.</div><div><img src="uploads/1/_Guideline-20.08b.png" height="205" width="195" border="0" /><br><br>Autogenerate Pin 1 Indicator Line: Enables the addition of a line next to pin1 on some parts, typically ICs.</div><div><img src="uploads/1/_Guideline-20.08c.png" height="214" width="195" border="0" /><br><br><b>Reference Designator Height and Width</b>: Fonts are not an option owing to differences in CAD translator options, so FPE uses height as a dimension with a percentage of height defining pen width. The effect of width can't be observed in FPE.</div><div><br></div><div><b>Add Reference Designator to Footprint</b>: Enables or disables the Reference Designator for a translated output.<br><br></div><div><b>Add Value to Footprint</b>: Enables or disables an additional silkscreen text "Value" for a translated output.</div><div><br><br><b><font size="4">Assembly Drafting Options</font></b></div><div><img src="uploads/1/_Guideline-20.09-AssemblyDraftingOpti&#111;ns.png" height="366" width="438" border="0" /><br><br><b>General</b>: Assembly layer drafting elements provide visual and dimensional details that guide component placement, orientation, and verification. Assembly layers and are critical for manufacturing accuracy.</div><div><br></div><div><b>Outline Width</b>: The assembly outline never gets manufactured, so the line width is user definable.</div><div><br></div><div><b>Map Outline to Body</b>: This drop-down menu sets the size of the silkscreen outline relative to the component body.</div><div><br></div><div>The default value is "Maximum".</div><div><br><br><b><font size="4">Polarity Indicator Options</font></b></div><div><img src="uploads/1/_Guideline-20.10-PolarityIndicatorOpti&#111;ns.png" height="220" width="421" border="0" /><br><br><b>Pin 1 Dot/Circle Size Not Larger/Not Smaller Than</b>: The silkscreen polarity dot size is automatically calculated to adjust to the component while maintaining a size within the range of these two values. Making the values equal results in a fixed dot size. The Chamfer also automatically adjusts the component size to maintain a size within the range of 1/3 the lesser of body height or width, not to exceed 1 millimeter.</div><div><br></div><div>&nbsp;</div><div><b>Add Polarity Bar To 2 Pin Parts</b>: When checked, polarity Indicator options are replaced by wide line at the pin 1 location of polarized 2 pin parts.</div><div><img src="uploads/1/_Guideline-20.11-PolarityBar.png" height="105" width="174" border="0" /><br><br><b>Reference Designator Height Minimum and Maximum</b>: Text values are automatically calculated to fit within the assembly outline while maintaining a size within the range of these two values. Making the values equal results in a fixed dot size. Fonts are not an option owing to differences in CAD translator options, so FPE uses height as a dimension with a percentage of height defining pen width. The effect of width can't be observed in FPE.</div><div><br></div><div><b>Add Reference Designator to Footprint</b>: Enables or disables the Reference Designator for a translated output.<br><br></div><div><b>Add Value to Footprint</b>: Enables or disables an additional assembly text "Value" for a translated output.</div><div><br><br><b><font size="4">Courtyard Options</font></b></div><div><img src="uploads/1/_Guideline-20.12-CourtyardOpti&#111;ns.png" height="266" width="426" border="0" /><br><br><b>General</b>: A courtyard defines the minimum clearance area around a component's footprint to ensure manufacturability, assembly, and rework-ability. It is not part of any electrical circuit but is critical for mechanical and process requirements. The courtyard to body is mapped to the maximum package dimensions.</div><div><br></div><div><b>Outline Width</b>: User definable.</div><div><br></div><div><b>Add Outline to Footprint</b>: Enables or disables addition of the Courtyard to the footprint.</div><div><br></div><div><b>Expand Courtyard to Include Silkscreen</b>: Allows expansion of the Courtyard to encompass the Silkscreen outline in situations where the Silkscreen size exceeds the Courtyard.</div><div><img src="uploads/1/_Guideline-20.13-ExpandCourtyard.png" height="147" width="395" border="0" /><br><br><b>Apply Courtyard Excess to Body/Pads</b>: When checked, does not add the excess over body, or pads respectively, to courtyard. Note: The Expand Courtyard to Include Silkscreen is not affected by this option.</div><div><br></div><div><b>Courtyard Excess values</b>: These values are not found in the Courtyard Drafting Options but are included with Terminal Options and, as such, unique to each terminal type - grid arrays, surface mount and thru-hole.</div><div><br></div><div><b>Contoured Courtyard</b>: When checked, allows the Courtyard to conform to irregular shapes that might be present in the footprint.</div><div><img src="uploads/1/_Guideline-20.14-C&#111;ntourCourtyard.png" height="146" width="319" border="0" /><br><br><b>Rectangular Courtyard</b>: This was the original IPC-SM-782 courtyard shape.</div><div><img src="uploads/1/_Guideline-20.15-RectangularCourtyard.png" height="149" width="321" border="0" /><br><br><b>Minimum Cut in Gap</b>: This option defines the minimum size of a space that can included by a Courtyard contour. Values smaller than this size will be ignored by the contour.</div><div><img src="uploads/1/_Guideline-20.16-MinCutInGap.png" height="247" width="326" border="0" /><br><br><br><b><font size="4">Origin Options</font></b></div><div><img src="uploads/1/_Guideline-20.17-OriginOpti&#111;ns.png" height="180" width="433" border="0" /><br><br><b>General</b>: An Origin construct defines a visual, physical reference indicating a point from which all other footprint dimensions may be referenced. The Origin construct consists of two independent drafting features forming a crosshair and circle.</div><div><br></div><div><b>Outline Width</b>: user definable as there is no industry standard.</div><div><br></div><div><b>Maximum Crosshair Size</b>: defines the maximum length of a crosshair line (plus the outline width). As a footprint shrinks, the crosshair size is reduced in proportion to the courtyard.</div><div><br></div><div><b>Add Crosshair to Footprint</b>: When checked allows an origin crosshair to be added to a footprint.</div><div><br></div><div><b>Add Target to Footprint</b>: When checked allows an origin target to be added to a footprint.</div><div><br></div><div><br></div><div><b><font size="4">Component and Terminal Options</font></b></div><div><img src="uploads/1/_Guideline-20.18-Comp&#111;nentAndTerminal.png" height="179" width="443" border="0" /><br><br><b>General</b>: Component and terminal outlines are always shown in the nominal material condition. This is done to maintain a consistent relationship that prevents confusing overlapping outlines that would occur with mixed material conditions.</div><div><br></div><div><b>Component Outline Width</b>: User definable.&nbsp;</div><div><br></div><div><b>Add To Footprint</b>: When checked, allows the nominal component body outline to be added to a footprint.</div><div><br></div><div><b>Terminal Outline Width</b>: User definable. This feature is used for visibility of the terminal lead on the pad. If the terminal lead is not 100% on the pad, there is something wrong with the dimensions.</div><div><br></div><div><b>Add To Footprint</b>: When checked, the nominal terminal outlines to be added to the footprint.</div><div><br><br><b><font size="4">Drafting Element Properties</font></b></div><div><br></div><div><b>General</b>: Right-clicking on any of the drafting items will open a dialog box, appropriate to the selected item, displaying its characteristics for viewing only.</div><div><img src="uploads/1/_Guideline-20.19-DraftingElementProp.png" height="275" width="592" border="0" /><br><br><br><b><font size="4">Symbol and Keep-out Creation Tools</font></b></div><div>The Symbol and Keep-out Creation Tools provide the means for manual design and placement of drafting elements that do not lend themselves to an automatic Calculator function. The tools are activated from a drop-down button on the Footprint Viewer toolbar.</div><div><img src="uploads/1/_Guideline-20.20-SymbolAndKeepout.png" height="143" width="263" border="0" /><br><br><b>Symbol/Shapes and Keep-outs</b>: Clicking either drop-down item Opens the Symbol Shape or Keep-out Properties Dialog Boxes respectively.</div><div><br></div><div><b>Note</b>: Adding drafting symbols should be done as a final step in footprint creation. Symbols and keep-outs are typically placed in relation to other footprint features. Therefore, any time a component specification, rule or drafting element is changed, all manually added symbols and Keep-outs are deleted. However, once added, symbols and keep-outs are saved to the FPX library with the footprint.</div><div><br><br><b><font size="4">Drafting Symbol Creation</font></b></div><div><img src="uploads/1/_Guideline-20.21-DraftingSymbolCreati&#111;n.png" height="341" width="464" border="0" /><br><br><b>Shape</b>: The following illustrates a variety of available symbol shapes. Shapes can be configured for line width, size, fill, orientation and placement.</div><div><img src="uploads/1/_Guideline-20.22-Shape.png" height="374" width="295" border="0" /><br><br><b>Layer</b>: Selects the layer assignment for symbols. Some symbols, such as Diode and Arrow can only be added to silkscreen and assembly layers.&nbsp;</div><div><img src="uploads/1/_Guideline-20.23-Shape.png" height="207" width="257" border="0" /><br><br><b>Outline Width</b>: Silkscreen and assembly symbol line width should match the master line widths.</div><div><br></div><div><b>Fill</b>: When checked, creates a solid feature. Fill is not available for diodes or half circles.</div><div><br></div><div><b>Size</b>: This option can be specified in one of three ways: Diameter, for round features; Height and Width, for square and rectangular features; Size for Line, Cross, Chamfer, 60' Triangle and Diode; Base (the arrow base) for Arrow.</div><div><br></div><div><b>Orientation</b>: This option may be specified, with limitations, to some shape types.</div><div><br></div><div><b>Placement X and Y</b>: The X and Y numeric controls may be used to locate or relocate the symbol. Clicking on one of the "target" icons resets the value to zero. The F2 key may be used to capture an X-Y location prior opening the Symbol menu.</div><div><img src="uploads/1/_Guideline-20.24-XandY.png" height="86" width="290" border="0" /><br><br><br><b><font size="4">Keep-out Creation</font></b></div><div><img src="uploads/1/_Guideline-20.25-KeepoutCreati&#111;n.png" height="345" width="456" border="0" /><br><br><b>Shape</b>: Basic Keep out available shapes are round, square and rectangular.</div><div><img src="uploads/1/_Guideline-20.26-Shape.png" height="131" width="261" border="0" /><br><br>A notable exception is the Courtyard option. This option creates a keep out that mirrors the courtyard allowing restrictions that can be applied to the entire footprint.</div><div><img src="uploads/1/_Guideline-20.27-CourtyardOpti&#111;n.png" height="498" width="467" border="0" /><br><br><b>Layer</b>: Selects the layer assignment for keep outs.&nbsp;</div><div><img src="uploads/1/_Guideline-20.28-Layer.png" height="111" width="254" border="0" /><br><br><b>Placement X and Y</b>: The X and Y numeric controls may be used to locate or relocate the keep-out. Clicking on one of the "target" icons resets the value to zero. The F2 key may be used to capture an X-Y location prior opening the Keep-out menu.</div><div><img src="uploads/1/_Guideline-20.29-PlacementXandY.png" height="84" width="295" border="0" /><br><br><b>Restrictions</b>: Defines the feature types that will not be allowed within the keep-out area. Placement Height is the maximum allowable height of any object within keep-out area.</div><div><img src="uploads/1/_Guideline-20.30-Restricti&#111;ns.png" height="142" width="368" border="0" /><br><br><br><b><font size="4">Symbol and Keep-out Properties</font></b></div><div><br></div><div><b>Apply</b>: This button will add a highlighted current symbol or keep-out feature to the footprint. When highlighted, the feature will continue to be subject to changes made and can be updated any time buy click apply.</div><div><br></div><div><b>New</b>: This button will instantiate an applied feature and initiate a feature of the same type (symbol or keep-out). This makes it unnecessary to close and reopen a menu in order to define and add a new feature.</div><div><br></div><div><b>Cancel</b>: This button will abort any feature currently in progress and return to the start menu configuration.</div><div><br></div><div><b>Done</b>: Closes the feature's menu. Upon closing, a reminder message will be displayed for features that have not been applied.</div><div><br></div><div><b>General</b>: Right-clicking on any symbol or keep-out feature will allow selection of a Properties dialog box, which just happens to be the Creation tool menu, allowing a full editing capability of the selected feature.</div></div><div><br></div><div><div><br></div><div><div><img src="https://www.pcblibraries.com/Products/FPX/img/Guideline150-2xs.png" border="0" align="left" /></div><div><br></div><t></t><t></t><t></t><t></t><t></t><t></t><table border="0" cellspacing="0" cellpadding="0"><t><tr><td style="padding-left: 0.1in; padding-right: 0.05in;"><b>FOOTPRINT EXPERT GUIDELINE Topics</b></td></tr><tr><td style="padding-left: 0.1in; padding-right: 0.05in;"><a href="https://www.pcblibraries.com/forum/terms-and-definiti&#111;ns_topic3672.html" target="_blank" rel="nofollow">Terms &amp; Definitions</a>&nbsp;&nbsp; &nbsp; &nbsp;&nbsp;<a href="https://www.pcblibraries.com/forum/comp&#111;nent-de&#115;cripti&#111;ns_topic3673.html" target="_blank" rel="nofollow">Component Descriptions</a>&nbsp;&nbsp; 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&#091;<a href="https://www.pcblibraries.com/forum/throughhole-comp&#111;nent-families_topic3697.html" target="_blank" rel="nofollow">Through-hole</a>&#093;</td></tr></t></table></div><div><br></div><div><br></div><div><img src="https://www.pcblibraries.com/Products/FPX/img/FPX_Case1_26pod.png" height="234" width="176" border="0" align="left" /></div><div><br></div><div><div><i><font size="3"><span style="font-weight: bold; line-height: 17.12px; font-family: Aptos, sans-serif;">The Footprint Expert automates footprints to perfection.</span><span style="line-height: 17.12px; font-family: Aptos, sans-serif;"> Professional, detailed, and accurate parts - all built consistently with identical rules, regardless of how many people are involved in your library development.</span></font></i></div><div><div><br><span style="font-size: 12pt;">Get your FREE <b>Footprint Calculator</b> or <b>Footprint Expert</b> Evaluation License:<br></span><a href="https://www.pcblibraries.com/Register" target="_blank" rel="nofollow"><b>https://www.PCBLibraries.com/Register</b></a></div><p ="ms&#111;normal"=""><span style="line-height: 14.98px;"><font size="2">Call us - <b>847-557-2300</b></font></span></p></div></div></div>]]>
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   <pubDate>Thu, 20 Aug 2026 11:00:39 +0000</pubDate>
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  </item> 
 </channel>
</rss>