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  <title>PCB Libraries Forum : Include Via in Thermal Pad Footprint</title>
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  <description><![CDATA[This is an XML content feed of; PCB Libraries Forum : Questions &amp; Answers : Include Via in Thermal Pad Footprint]]></description>
  <pubDate>Sun, 05 Apr 2026 17:04:23 +0000</pubDate>
  <lastBuildDate>Fri, 01 Oct 2021 09:54:06 +0000</lastBuildDate>
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   <title><![CDATA[Include Via in Thermal Pad Footprint : Most CAD tools cannot handle vias...]]></title>
   <link>https://www.PCBLibraries.com/forum/include-via-in-thermal-pad-footprint_topic2990_post11927.html#11927</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 2990<br /><strong>Posted:</strong> 01 Oct 2021 at 9:54am<br /><br />Most CAD tools cannot handle vias in Thermal Pad without a pin name.&nbsp;<div><br></div><div>Most CAD tools cannot move or delete vias built into a PCB library part once it's in the PCB design.&nbsp;</div><div><br></div><div>We created an entire library where every Thermal Pad had vias and put it out to our customers. Lots of complaints came in, so we removed them.&nbsp;</div><div><br></div><div>You can add vias to the Thermal Pad in FP Designer if you like.</div><div><br></div>]]>
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   <pubDate>Fri, 01 Oct 2021 09:54:06 +0000</pubDate>
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   <title><![CDATA[Include Via in Thermal Pad Footprint : Hi,In a QFN footprint with a thermal...]]></title>
   <link>https://www.PCBLibraries.com/forum/include-via-in-thermal-pad-footprint_topic2990_post11926.html#11926</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=16221">gvellet</a><br /><strong>Subject:</strong> 2990<br /><strong>Posted:</strong> 01 Oct 2021 at 9:13am<br /><br />Hi,<div><br><div>In a QFN footprint with a thermal pad in the center. Is there a reason why we should not include the n vias in the thermal pad already in the footprint?&nbsp;</div><div><br></div><div>If I am not mistaken, the standard practice is that the PCB designer shall instantiate the footprint on his PCB.&nbsp;</div><div><br></div><div>Then while doing the layout he adds manually the vias in the thermal pad of each QFN package.&nbsp;</div><div><br></div><div>It seems to me like error prone and a waste of time.</div><div><br></div><div>Thank you,</div><div><br></div></div>]]>
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   <pubDate>Fri, 01 Oct 2021 09:13:54 +0000</pubDate>
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