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  <title>PCB Libraries Forum : Footprint Expert 2021.09 Released!!</title>
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  <pubDate>Thu, 09 Apr 2026 09:31:10 +0000</pubDate>
  <lastBuildDate>Fri, 09 Jul 2021 12:29:59 +0000</lastBuildDate>
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   <title><![CDATA[Footprint Expert 2021.09 Released!! :  2021.09 was just released!!Updates...]]></title>
   <link>https://www.PCBLibraries.com/forum/footprint-expert-2021-09-released_topic2951_post11769.html#11769</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=1">Nick B</a><br /><strong>Subject:</strong> 2951<br /><strong>Posted:</strong> 09 Jul 2021 at 12:29pm<br /><br /><p style="margin-right: 0px;" dir="ltr"><a href="http://www.pcblibraries.com/downloads" target="_blank" rel="nofollow"><font color="#0066cc"><u>2021.09 was just released</u></font></a>!!</p><p style="margin-right: 0px;" dir="ltr"><img src="https://www.pcblibraries.com/Forum/uploads/1/PCBLDVDDownloadNow2021.png" height="275" width="204" border="0" /></p><div>&nbsp;</div><div dir="ltr"><u><strong>Updates &amp; Bugs Fixed:</strong></u></div><ul dir="ltr"><li>Drafting Options:</li><ul><li>Added a new Right-Angle Triangle. This is mostly used for Pin 1 corner Polarity Marking. </li></ul><li>Console Options:</li><ul><li>IPC-7351B Naming Convention – in the SOIC component family, the program was adding an extra X after the pin pitch.</li><li>Master FPX File Name – when the master FPX file name was longer than 20 characters, the program was throwing an Unhandled Exception Error.</li><li>Pad Stack Rules – Gang Solder Mask Shape had a bug issue that affected solder mask shape on SMD pads.</li></ul><li>Calculator Component Families:</li><ul><li>All Grid Array’s (BGA, CGA &amp; LGA) – setting the local Calculator solder mask in “Pad Stack Rules” panel does not work. A warning message was inserted prompting the user to set the solder mask swell in the “Terminal Density Level” panel.</li><li>All Through-hole Headers – When moving Headers to FP Designer and save to FPX, reopening the footprint dropped the Body Length &amp; Width.</li><li>MELF:</li><ul><li>When creating a Diode MELF, the local “Pad Stack Rules &gt; Miscellaneous &gt; Cathode/Anode Pin Names” was disabled.</li><li>When moving the MELF to FP Designer and save to FPX threw an error message.</li></ul><li>Chip, MELF, Molded, SOD &amp; SODFL Diodes - fixed Numeric/Alpha pin names and pin swap options on the right mouse button.</li><li>SMD Crystal – Physical Description had Body Length listed twice and no Body Width.</li><li>PQFN &amp; PQFN w/Thermal – footprint name had wrong body length and width.</li><li>SOP w/Thermal – the Physical Description did not indicate w/Thermal Tab.</li><li>DIP and DIP Socket:</li><ul><li>The Physical Description had the Length and Width swapped.</li><li>The Silkscreen Outline was not translating to any CAD tool.</li><li>When moving the DIP to FP Designer and save to FPX, reopening the footprint dropped the Body Width.</li></ul><li>Flange Mount (TO) Horizontal – the Physical Description was missing the Body Length and the Pin Qty was incorrect.</li><li>Flange Mount (TO) Vertical – the Footprint Name and Physical Description had the Body Length and Width swapped.</li><li>All Through-hole families:</li><ul><li>Pads and Holes on Assembly did not work properly.</li><li>Courtyard to Pad Excess was 0.45 and updated to 0.25.</li></ul></ul><li>CAD Tools:</li><ul><li>KiCad – through-hole pad stacks had holes on assembly going to the fabrication layer.</li></ul><li>Options:</li><ul><li>Drafting &gt; Silkscreen – changing the Reference Designator line width % was resetting back to 10% default when closing and reopening the program.</li></ul></ul><p dir="ltr">&nbsp;</p>]]>
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   <pubDate>Fri, 09 Jul 2021 12:29:59 +0000</pubDate>
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