PCB Libraries Forum : PCB Libraries Guideline

PCB Libraries Guideline : SMD Pad Stack Rules

Sat, 15 Aug 2026 11:00:40 +0000

Author: Nick B
Subject: SMD Pad Stack Rules
Posted: 15 Aug 2026 at 11:00am

Pad Stack Rules will globally define the rules for every footprint created in the Surface Mount Calculators. These rules are not used for custom FP Designer footprints because the user manually defines every pad stack in custom parts. Custom footprints always use the component manufacturer recommended pattern and pad sizes because there are no standard recommendations or guidelines for unique packages and their related footprint patterns. The default values are best known practice, but users can edit any value for their PCB library requirements.

Solder and Paste Masks

Solder Mask Note:

Solder mask is an epoxy coating that protects the circuit from corrosion and electrical shorts. It also provides electrical insulation that allows higher voltage traces to be placed nearer to each other.

Most importantly, the solder mask keeps the solder on the pads, as opposed to flowing onto traces, planes, or empty board space. This reduces the likelihood that solder will form bridges (unintended connections) from one element to another. Solder masks are critical for wave soldering, which is a mass production technique. Solder masks also make hand soldering faster, easier, and more accurate.

a. Minimum Allowable Solder Mask Web - 0.075 or 0.10

This rule is for PCB fabrication. The solder mask stencil must have a minimum 0.075 mm between pads. Anything less than that is not manufacturable. When the solder mask web violates the minimum value, Footprint Expert will automatically gang the solder mask into a solid block. If you provide Gerber data with a solder mask web less than 0.075 mm to fabrication, they will automatically gang mask the row of pads for you, and not tell you. If you provide 1:1 scale solder mask to fabrication, they will swell the mask to meet their fabrication tolerance for their solder mask application. Fabrication CAM tools will alert the operator of all solder mask webs less than 0.075 and the operator will gang mask all solder mask areas that violate the minimum solder mask web.

b. Solder Mask Annular Ring Expansion - typically between 0.05 - 0.075

Some PCB designers use a solder mask expansion between 0.05 - 0.075 because they use that as a visual for placing reference designators on a final part placement. Silkscreen Legend Ink should not be in an exposed solder mask area. If you place silkscreen legend in a solder mask free area in your PCB layout, the fabrication process will automatically trim the silkscreen legend away from the free solder mask area. But many PCB designers leave the solder mask 1:1 scale of the pad and allow the PCB fabrication shop to automatically swell all solder mask features to meet their solder mask registration tolerance.

c. Paste Mask (% of Pad Size) - 100%

Normally, paste mask on pads is 1:1 scale but this option allows the user to increase or reduce the amount of Paste Mask on a pad.

d. Gang Solder Mask

When the Solder Mask Annular Expansion rule is violated, Footprint Expert will automatically Gang Mask the entire row. This image illustrates an Oblong pad shape Gang Mask

This image illustrates a Rounded Rectangle pad shape with Pin 1 Oblong Gang Mask

e. RF Design Note

For RF, microwave and high frequency controlled impedance traces, solder mask should be removed from above the transmission line. The solder mask alters the dielectric environment by replacing air (Dk ≈ 1) with mask resin (Dk ≈ 3-4), increasing effective Dk, adding loss, and disturbing the EM field distribution that defines the line's impedance. Mask thickness and moisture absorption further introduce variability. To maintain stable impedance and minimize RF loss, specify a solder mask keep-out over all RF microstrips, antennas, and matching network traces.

Corner Rounding

a. Corner Radius Size (% of Pad Width) - 25%

The 25% value is applied to every corner, that is equivalent to 50% of the pad width.

b. Corner Radius Size Limit - 0.10

The 0.10 default value sets the limit on the corner radius. Some component manufacturers recommended solder patterns indicate a 0.05 mm corner radius. The corner radius size limit is totally up to the PCB designer or CAD librarian. There is no recommended Standard for this radius limit. Some companies use a 0.15 - 0.20 Corner Radius Limit. Any value above 0.20 is excessive.

Corner Radius Note:

Some people say that rounded rectangle pad shape is best for lead free solder. This is a myth, as all pad shapes are OK with lead free solder. IPC has recommended Oblong pad shape since the release of IPC-SM-782 in March 1987. The 782 Standard had both text and graphic illustrations. The text referred to Oblong (or Full Radius) pad shape but the images portrayed Rectangle Pad Shape. This was confusing to the reader of the Standard. Most component manufacturers recommended patterns for surface mount parts illustrate Rectangular pad shape. The Rounded Rectangle Pad Shape is a compromise between the world standard Oblong and the component manufacturer Rectangle. Also, it is important to note that paste mask stencil aperture openings are laser cut with rounded corners. It makes sense to have the pad shape match the paste mask stencil aperture shape.

When the PCB goes through a reflow oven, the paste mask tends to gravitate toward the terminal lead and away from the pad corners. It doesn't make sense to have rectangular pad shapes with no solder in the pad corners. Here is a photo of both lead and lead-free solder with no solder in the corners.

Manufacturing Tolerances

Manufacturing Tolerances Note:

Manufacturing tolerances have existed in the IPC mathematical model for surface mount pad size calculation since 1987. The Fabrication Tolerance was used to compensate for the etching process. But in the 1990's, the fabrication shops started to swell the outer layers to compensate for their etch back tolerances so that they could deliver pad sizes and trace widths the same size as the original Gerber data. But there is also an issue with the subtractive process where the etch acid gets slightly under the photo resist and creates a trapezoidal effect in the trace and pad. IPC-7351 uses a 0.05 mm fabrication value in the pad size math to compensate for this subtractive process. The average copper thickness on the outer layers is ½ oz. or 0.017 mm. The acid under photo resist undercut value is only a small percentage of that. Basically, the Fabrication Tolerance added to the pad size calculation is no longer applicable.

The Assembly Tolerance used in the IPC-7351 mathematical model for pad size calculation is 0.025 and established in 1987. This value was to compensate for the assembly machine placement accuracy. Today's advanced assembly machines place components with a 0.01 accuracy or less. The Assembly tolerance added to the pad size calculation is no longer applicable today.

When IPC developed the solder joint goals for IPC-7351, side goals for fine pitch semiconductor packages had to be set at negative values to compensate for the robust manufacturing tolerances. IPC-7352 turned off the manufacturing tolerances and updated every negative value in the Terminal solder joints to 0.00. By turning off the manufacturing tolerances and changing all negative solder joint goals to 0.00, the pad length & width size is only affected by +/-0.05.

Lead Part	Maximum (Most) Density Level A	Median (Nominal) Density Level B	Minimum (Least) Density Level C
Toe (J)	0.55	0.45	0.35
Heel (J)	-0.05	-0.07	-0.10
Side (J)	-0.05	-0.07	-0.10
Round-off factor	Round off to nearest two place decimal, i.e., 1.00, 1.05, 1.10, 1.15
Courtyard excess	0.50	0.25	0.10
Resistor Chip Array Concave RESCAV, CAPCAV, INDCAV, OSCSC

IPC-7352 changed the Fab & Assy Tolerances:

Fabrication Tolerance (+/-) = 0.00
Placement Tolerance (+/-) = 0.00

Minimum Trim and Spacing

a. Minimum Pad to Pad - 0.15

The minimum pad to pad rule is intended for surface mounted parts. When the pad spacing violates this rule, Footprint Expert will automatically trim the pad to enforce this rule and an error message will be created that looks like this:

The value of 0.15 is arbitrary and not a hard-coded standard. The minimum pad to pad spacing rule should never violate your minimum PCB clearance rule. If your PCB layout is using a minimum trace/space rule of 0.20 mm then you should set the minimum pad to pad rule to 0.20.

Also, if you wanted to insure a 0.08 minimum solder mask web and your solder mask swell is 0.05 then change the value to 0.18. If the minimum pad to pad is 0.15 and the pads violate that rule, the Gang Mask feature will kick in and mask the entire row.

b. Minimum Pad to Thermal Tab - 0.20

The minimum pad to thermal rule is primarily established by the majority of component manufacturer's recommended patterns and not any industry Standard. If the thermal pad is too big and violates this rule, the pads will be trimmed, and a warning message will be created that looks like this:

c. Minimum Trim Standoff Height - 0.03

The minimum stand-off is the A1 package body bottom to PCB space dimension in gull wing packages.

The default "minimum" value of 0.03 mm will only trim pad Heel under the component package if the A1 value is less than 0.03. The main purpose for pad trimming under low profile packages is to eliminate paste mask from touching the plastic body during reflow. The pad Heel is an important part of the gull wing solder joint, but if the Heel pad is under a low profile package, the solder on the pad Heel is pushed out by the weight of the package creating excess solder.

IPC-J-STD-001 mentions in table 7-7 Dimensional Criteria - Flat Gullwing Leads. Note 4: Solder should not extend under the body of surface mount components whose leads are made of Alloy 42 or similar metals.

Thermal Tabs

a. Solder Mask Expansion +/- 0.00

Typically, the thermal tab solder mask is 1:1 scale of the pad size. It's OK for the fabrication solder mask tolerance to be +/- 0.05 that could result in the solder mask creeping over the thermal pad. The minimum paste mask aperture is 0.10 mm from the edge of the thermal pad. Most component manufacturers recommend a 1:1 scale solder mask on thermal pads.

b. Pattern Defined Solder Mask - on/off check box

The default setting for this feature is turned off because the user must accept the responsibility for turning it on. The solder mask defined thermal pad places solder mask in-between the paste mask apertures, basically damming in the paste mask from flowing. The IPC-7093A describes all the benefits of this feature.

Ability to add vias in the solder mask area and the paste mask will not flow down the via hole. This could potentially save on fabrication costs to avoid via plugging to stop the flow of paste mask into the via hole.

This image provides some basic values for defining a solder mask defined thermal pad.

This image illustrates a 0.10 mm paste mask stencil thickness for the image above.

Because the paste mask is dammed in by solder mask, this reduces paste mask voiding because the solder has nowhere to flow. The amount of voiding post reflow should not exceed 25% per IPC-A-610. Voiding occurs when the thermal pad is not solder mask defined.

c. Paste Mask % - 60%

The default setting is 60% paste mask coverage. IPC-7093A figure 3-10 recommends that the stencil design provide 60 - 70% solder paste coverage on the thermal pad area.

d. Minimum Intra-Pattern Pattern Space - 0.20

The default setting for this feature is 0.20 mm. It is important to have a minimum stencil aperture spacing to increase the stencil web strength. This will make the stencil last longer and work better.

e. Minimum Pattern to Pad Edge Space - 0.10

The default setting for this feature is 0.10 mm. This setting works OK up to 70% paste mask coverage. If you need 80% paste mask coverage, you will need to set this value to 0.00 to allow paste mask to extend to the edge of the pad. If you keep the 0.10 paste to pad edge and have 80% paste mask coverage, the checkerboard pattern will turn into a single aperture.

If you use the solder mask defined thermal pad feature and intend to place vias in-between the paste mask you need to figure out the via hole size and add 0.10 for the minimum pattern space. Example: if the via hole size is 0.20 + 0.10 clearance for the solder mask web, then the thermal tab minimum pattern space should be set to 0.30. Or you can move the calculator part to FP Designer and edit the pad stack paste mask to set the aperture size and spacing.

Note 1: The Solder Mask and Paste Mask aperture opening are the same size and location.

Note 2: 9 vias provide the maximum thermal relief for most packages with thermal tabs.

SMD and TH Miscellaneous

Cathode/Anode Pin Names - Alphanumeric or Numeric

The default setting is Alphanumeric and produces pin names A & C. This setting is primarily used for schematic symbols that support Alphanumeric pins. The preferred pin label assignments for Diodes and LED's are C and A for Cathode and Anode. This avoids making a mistake between the schematic symbol and the CAD library. But if you use numeric pin names on these polarized devices, you must make sure that the schematic symbol pins 1 & 2 match the PCB footprint pins 1 & 2. You can also rename Diode and LED pins to any alphanumeric value to match the schematic.

The Footprint Expert automates footprints to perfection. Professional, detailed, and accurate parts – all built consistently with identical rules, regardless of how many people are involved in your library development.

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PCB Libraries Guideline : FPX File Definition

Sat, 15 Aug 2026 11:00:41 +0000

Author: Nick B
Subject: FPX File Definition
Posted: 15 Aug 2026 at 11:00am

The FPX file library is a collection of package dimensions for standard parts and manufacturers recommend patterns for non-standard parts. Standard part footprints are created in the calculator using one of the 144 surface mount or through-hole templates. Non-standard parts are created using the FP Designer module in Footprint Expert.

All connectors are non-standard parts except headers that have a symmetrical pad pattern with one pad stack and the pins are evenly placed using the same X/Y grid system. Any semiconductor that requires more than one pad stack length or width is a non-standard package. Any discrete component that its terminal lead form is not listed in the surface mount standard terminal leads is considered a non-standard package.

The Calculators save this information in the FPX file library:

Package Dimensions
3D STEP Color
Manually inserted Drafting Symbols
Manually inserted Keepout
Manufacturer Recommended Pattern
Manually Updated Pin Names or Reordered Pins

All other footprint features are generated in Tools > Options. When you open a FPX file calculator part, the package dimensions will auto-populate the package dimensions in the correct cells. The resulting footprint is derived by combining the package dimensions with the Terminal Solder Joint Goal Settings for that component family and the Drafting Rule Settings for silkscreen, assembly, courtyard, component, terminal and origin outlines. The package and terminal tolerances also play a role in the pad stack calculation.

You can create multiple Option files with different rule settings and use the same FPX file to create multiple libraries. Set up Options to solder mask define pad stacks for Flex circuits. Or set up rules with larger solder joint goals for Wave Solder. Or create an Option file with rules from an assembly shop or rules for a specific customer. Use the same FPX file to create multiple libraries for different applications.

For non-standard FP Designer parts, a lot more data is saved in the FPX file. FP Designer footprint data that is saved in the FPX file include:

3 Package dimensions
Pad Stack Data
Courtyard Excess
Manually inserted Drafting Symbols
Automatic Assembly Polarity Location
Manually inserted Keepout
Footprint Rotation
Physical Description
Manufacturer Name
Case Code
Part Number
Pin Names
Footprint Origin Location
Footprint Name
3D Color

The FPX file comes with these column headers, but you can add additional columns:

Footprint Name
Physical Description
Case Code
Manufacturer
Part Number
Logical Description
Mounting Type
Datasheet
Part Status
Footprint Date
Comments

The FPX file has built in features that help automate and organize library data. When you select a Calculator component family and enter the package dimensions and Save to FPX Library, Footprint Expert autogenerates the Footprint Name, Physical Description, Mounting Type, Part Status and Footprint Date. The Manufacturer Names are embedded into the program. When the Manufacturer cell is selected, just enter the first couple letters of the Manufacturer Name and a list of Manufacturers appear in a dropdown menu selection.

By typing a 'T' in the Manufacturer cell, every manufacturer name that begins with 'T' will appear in the dropdown menu.

Type 'TE' and the list will only include manufacturer names that include 'TE'.

Type 'TEX' and the list will only include manufacturer names that include 'TEX'. Texas Instruments is the only manufacturer that begins with TEX. Select Texas Instruments and it will auto-populate the Manufacturer cell.

This will ensure that all the spelling of every manufacturer is consistent.

The Case Code and Part Number must be manually entered or copy/paste from a datasheet.

Once the full Part Number is populated, you can Right Mouse Click that cell and a dropdown menu will appear with these options:

When 'Internet Browser' is selected, the default web browser will display all the websites that support that Part Number.

When 'Parts on Demand (POD)' is selected, the default browser will open www.pcblibraries.com/POD allowing you to download that part into your /downloads folder. Then you can import the FPX file into your Master Library and create the footprint out to your CAD tool.

When 'Manufacturer Home Page' is selected, the main page to that Manufacturer will open in your default browser., You can copy/paste the part number into the search box to locate the datasheet.

Note: The Part Number search requires the Manufacturer Name cell to be populated.

The same feature is available if you have the correct Case Code cell entered.

The 'Datasheet' cell can be https:// or a network drive path to a PDF datasheet.

The 'Mounting Type' cell can be auto populated by entering a S for Surface Mount or T for Through-hole or M for Mixed Technology.

Here are the control features for the Library Editor.

Open an existing FPX file library
Save the current FPX file (this icon will turn gray when the file is saved)
Create a New FPX file
Import an FPX file into an existing FPX file
Batch Build a selection of parts to CAD tool
Unlimited Undo
Unlimited Redo
Search for text in the FPX library
Remove all highlighted Markers
Show a list of component family Categories
View the selected footprint
Open the Datasheet

Delete a Row by selecting the gray button to the left of the Footprint Name and Right Mouse Click and select 'Delete Row'.

Add a new blank row by Right Mouse Click and select 'New - Row' or 'New - Rows'.

Add a new column by Right Mouse Click and select 'New - Column'. Create as many columns as you need.

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PCB Libraries Guideline : Design Units

Sat, 15 Aug 2026 11:00:42 +0000

Author: Nick B
Subject: Design Units
Posted: 15 Aug 2026 at 11:00am

PCB Footprint Expert Design Units User Interface

There are 4 options (millimeter, micrometer, inch, mil) for units, but millimeter is the most popular today because most package dimensions in manufacturer datasheets are displayed in millimeter units.

Decimal Place Accuracy > Minimum / Maximum

Most PCB Library Parts are created in millimeter units to match the current package datasheet, but everyone is in a different environment. The new "Units" allows you to set the Minimum and Maximum rounding values.

By setting the Minimum and Maximum values, you establish the program rounding values.

Example 1: using 2 place Minimum accuracy, entering a 0.8 value, will display as 0.80. The program will automatically add a trailing zero to round the value 2 place minimal accuracy.

Example 2: using 2 place Maximum accuracy, all values will be rounded up to the nearest 0.01. Entering a 0.025 value would display as 0.03.

The program default settings are Minimum 2 and Maximum 3. Because the minimum is 2, the program will automatically remove all training zero’s past 2 places. And the maximum setting of 3 will only round up values less than one micrometer.

Example 3: using a 3 place Maximum accuracy, a value of 0.3255 will be rounded up to 0.326

Example 4: using a 2 place Minimum accuracy, a value of 0.29 will be rounded up to 0.30

4 units = 0.0001
3 units = 0.001
2 units = 0.01
1 unit = 0.1

The most important thing is that both the minimum and maximum options go up to 6 places. This accuracy is intended to increase the rounding accuracy when converting between Metric and Imperial units. It is not recommended that users select 6/6 as their min/max because this will affect the Physical Description that is auto generated by Footprint Expert in the FPX file. Having every value 6 places to the right of the decimal point would also affect every component family calculator, as every value will be rounded and displayed with 6-point accuracy. A simple value of 0.01 would display as 0.010000 and the Physical Description would be the same.

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PCB Libraries Guideline : Pad Shapes

Sat, 15 Aug 2026 11:00:43 +0000

Author: Nick B
Subject: Pad Shapes
Posted: 15 Aug 2026 at 11:00am

Surface Mount

Oblong

Recommended by IPC-7351

D-Shape

Recommended by some component manufacturers

Rectangle

Recommended by most component manufacturers

Square

Used on Land Grid Arrays (LGA)

Rounded Rectangle

Recommended by assembly shops for better stencil release; the default corner radius is 0.10 mm

Round

Used on Grid Arrays (BGA. CGA and LGA)

Through-hole

Square

Used on Pin 1 for Polarity on Diodes and Polarized Capacitors

Round

Used on all through-hole parts

Rounded Rectangle

Used on Pin 1 for Polarity on Diodes and Polarized Capacitors

FP Designer Surface Mount

FP designer includes all calculator pad shapes. These are the custom pad stacks available in FP Designer.
Rectangle and square pad shapes can be chamfered in 2 corners on the Top, Bottom, Left and Right sides.

Top Chamfer

Chamfered on one Corner in Upper Left, Lower Left, Upper Left, Upper Right.

Upper Left

Chamfered Lower Left with Radius Corners

FP Designer Through-hole

Slotted Hole	Non-Plated Hole
Offset Slotted Hole	Chamfered Square
Round Hole with Oblong Pad	Chamfered Rectangle with Offset Hole

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PCB Libraries Guideline : Terminal Lead Forms

Sat, 15 Aug 2026 11:00:44 +0000

Author: Nick B
Subject: Terminal Lead Forms
Posted: 15 Aug 2026 at 11:00am

BGA

A surface mount integrated circuit packaging type that utilizes a matrix of small solder spheres (solder balls) on the underside of the component to establish external electrical connections to a printed circuit board (PCB). By replacing traditional perimeter-only leads or pins with a full-surface area array, BGAs provide drastically higher interconnect density. This configuration optimizes electrical performance through shorter internal trace paths, dramatically reducing parasitic inductance and impedance in high-speed applications.

There are Collapsing and Non-collapsing BGA balls.

Collapsing

Non-collapsing

There is also a Solder Mask Defined BGA that has solder mask over the pad edges. The annular ring of the solder mask on pad is typically 0.05 mm. This technology is primarily used to secure the PCB pad to the PCB prepreg in handheld devices like cell phones. During drop tests, the solder joint between the BGA ball and the pad remains intact, but the pad could separate from the prepreg. Solder mask and prepreg are both epoxy resin (glue). The solder mask will help secure the pad to the prepreg to prevent the pad separating from the prepreg. This solder mask defined concept is primarily used on BGA pin pitches of 0.65 mm and lower, where the non-collapsing pad size is larger than the BGA ball diameter.

The primary reason for making the BGA pad size larger than the ball diameter is to accommodate via-in-pad technology because fine pitch BGAs cannot use the typical Dog-bone via fanout solution.

Dog-bone via fanout:

When creating dog bone fanouts for BGAs, the escape trace should be kept as wide and as short as possible. Generally, the trace is a wide as the ball width. A wider trace reduces series inductance, which is critical because the fanout forms part of the high frequency return path loop between the BGA ball, via, and internal plane. Narrow traces behave like inductors at RF, increasing impedance, degrading signal rise time, and injecting noise into adjacent balls.

Via-in-Pad technology is a technique used in PCB design where the via is placed directly in the pad. This approach is commonly used in high-density interconnect (HDI) designs, especially for fine pitch BGAs.

The via-in-pad (VIP) requires a separate fabrication process that includes plating, plugging and capping the hole and planarizing the capped pad to create a flat surface with no dimples. Capped pads with dimples create trapped air under the paste mask. When the PCB goes through the reflow oven, the trapped air in the pad dimple gets super-heated and blows through the solder and into the BGA ball causing a void.

Most of the time the via-in-pad is a microvia that goes from the top layer to the first signal layer. Then buried vias connect to all the other inner layers. All BGA GND connections use microvias to Layer 2. However, PCB fabrication can now drill a hole with a 10:1 aspect ratio. A 1.57 mm thick PCB can support a via hole size of 0.15 mm. But the pad size must be 0.35 to support a 0.10 mm annular ring. This solution is good for 0.40 – 0.65 mm pitch BGAs.

The free Footprint Calculator and the Footprint Expert use these tables for BGA footprint calculations. The Footprint Expert also creates high-quality BGA footprints and 3D STEP models directly from the package dimensions.

BGA Ball Materials:

The BGA ball may consist of a variety of metal alloys. Some of these include balls with some lead content such as 37Pb63Sn, 90Pb10Sn, 95Pb5Sn, while others do not contain lead such as Sn96.5Ag3.0Cu0.5, Sn96.5Ag3.5, Sn-9Zn-0.003Al. It is a good recommendation to use the same alloy, in a paste form, to attach the BGA balls to the mounting substrate; however, some of the balls that do not collapse require a paste that is more conducive to reﬂow temperatures.

Lead-free balls have a combination of tin, silver and copper. This is the replacement for the tin/lead ball. BGAs are usually assembled using the standard reﬂow solder processes.

Rectangular or Square End Cap

Metallized end bands or chip terminations) are the metal contact structures covering the opposing ends of passive surface mount electronic chip components. Unlike integrated circuits that use external pins, these terminal leads envelop the outer structural corners of the device to facilitate structural mounting and complete an electrical circuit. They are the standard terminal configuration for surface mount capacitors, resistors, thermistors, varistors, chokes, ferrite beads, antennas, crystals, diodes, filters, fuses, LEDs and inductors. This is the most popular lead form as chip components are usually 80% of the components on a PCB layout.

Cylindrical End Cap

A cap-shaped, round metal contact covering the opposing ends of a cylindrical component body. Rather than using protruding wires or flat rectangular bands, MELF components utilize these flush, circular metal barrels as their electrical and mechanical mounting interfaces. This terminal style is widely utilized for high-reliability surface mount resistors, diodes, and Zener regulators in automotive, industrial, and aerospace electronics.

Gullwing

An outward-bent surface mount technology (SMT) lead shape that resembles a seagull's wing in flight. The metal leads extend horizontally from the sides of an integrated circuit (IC) package, bend vertically downward toward the circuit board, and then bend outward again to create a flat mounting foot. This flat foot provides the primary electrical and mechanical contact surface for soldering onto a printed circuit board (PCB) land pad.

Gull wing leads are the dominant terminal style for highly utilized IC packages such as Small Outline Integrated Circuit (SOIC), Thin Small Outline Package (SOP), Quad Flat Package (QFP), Small Outline Transistor (SOT), Ceramic Flat Pack (CFP), Ceramic Quad Flat Pack (CQFP), Small Outline Diode (SOD) and DPAK.

Outward L Lead

Certain small Surface Mount components, such as some SOD’s and SOTs for example, with terminal leads that can be in the form of either Gullwing or Outward flat ‘L’ depending on their dimensions. It’s important to distinguish between the two to assign the correct protrusion goals (toe, heel and side) to obtain the most reliable footprint mounting. This is how the PCBL Footprint Expert does it.

Gullwing terminals are generally for parts with relatively larger terminals and provide more heel fillet.

Gullwing goals should be applied when:

S min > D1 max OR (L max – L min) >= 0 .5mm

Outward Flat L terminals are generally for smaller parts and do not provide as much heel fillet.

Outward Flat L goals should be applied when:

S min <= D1 max AND (L max – L min) < 0.50 mm

When a Gullwing change to Outward L occurs, this message will be displayed:

J-Lead

A specialized surface mount technology (SMT) component lead form that curves downward and tightly rolls underneath the package body in the shape of the letter "J". This configuration stands in contrast to Gullwing leads which extend outward. J-leads are widely used on Plastic Leaded Chip Carriers (PLCCs), memory modules, and tactile switches to reduce board footprint while maximizing mechanical compliance.

Inward L Lead

An Inward L-Lead form is a surface mount technology (SMT) component lead configuration where each terminal extends from the package body, bends downward at a right angle, and then bends sharply inward toward the center of the component body. This creates a low-profile, right-angle connection footprint that sits entirely underneath the perimeter of the device. It is primarily utilized on Small Outline L-Bend (SOL) packages and high-density ribbon assemblies to maximize available circuit board area.

Side Concave

A specialized surface mount technology (SMT) terminal design where the conductive contact pad curves inward toward the body of the component, forming a scalloped indentation or semicircular castellation along its edge. This design is primarily used on dense passive components like side-concave chip resistor arrays, multi-layered ceramic capacitor (MLCC) arrays, and edge-mounted castellated sub-modules (such as Wi-Fi/Bluetooth breakout boards)

Corner Concave

A surface mount component termination style where the conductive pads form scalloped, crescent-shaped vertical castellations directly on the outside corners of the device body. This configuration is most prominently featured on surface mount quartz crystal oscillators, clock generators, and specialized square filter modules.

Flat No-Lead Side

A PCB Flat No-Lead Side terminal lead (commonly categorized under flat, no-lead side terminations) refers to the perimeter signal pads found on Bottom Termination Components (BTCs). These are used on Quad Flat No-Lead (QFN) and Dual Flat No-Lead (DFN) packages.

The contacts do not project from the package sides; instead, they exist as flat metalized lands on the bottom face that terminate flush with the outer cut edge of the component wall.

Flat Lead

A surface mount or through-hole termination style where the component pins consist of flat, unbent, thin metal strips extending horizontally or vertically from the package body. Unlike round wire leads or pre-formed Gullwing leads, flat leads are completely linear and planar. They are primarily utilized on high-current surface mount inductors, flat-pack aerospace ICs, current-sense resistors, and planar transformers.

Under Body Outward L

A lead variant where the pins exit from the bottom or lower edge of the component casing, bend outward, but remain entirely hidden beneath the perimeter outline of the component package. Unlike standard Gullwing leads which extend well past the sides of a chip, or Inward L-Leads which hook back inward beneath the component frame, the Under-Body Outward L lead steps outward away from the package center but terminates before exiting the package bounds. It is most frequently found on Aluminum Electrolytic Capacitors, Crystal Oscillators, heavy shielded power inductors, and specialized SOT sub-packages.

Inward Flat Ribbon L

A specialized surface mount technology (SMT) lead configuration that combines the low-inductance, flat cross-section of a flat-ribbon lead with the space-saving geometry of an inward L-bend.

Instead of extending outward from the component body like a standard flat ribbon lead, the lead extends downward and then bends sharply at a right angle toward the center of the component body. This ensures the entire flat contact foot is tucked cleanly beneath the device perimeter. Used for Capacitors, Inductors, Diodes, LEDs, Chokes, Ferrite Beads, and Filters.

Land Grid Array/Bottom Only

A surface mount connection interface where the component features a grid of flat, coplanar metal pads on its bottom surface instead of protruding pins or solder balls. Electrical and mechanical connection to the PCB is established via a matching pattern of landing pads and an ultra-thin layer of solder paste, or through a mechanical socket. This architecture is widely used for high-performance processors, complex field-programmable gate arrays (FPGAs), wireless modules, and high-density sensors.

Column Grid Array

An advanced high-density surface mount packaging interface. Instead of utilizing spherical balls like a standard Ball Grid Array (BGA), a CGA utilizes an array of tall, cylindrical high-temperature solder columns or copper-reinforced posts that stand vertically on the underside of the component package.

This termination style is highly specialized and explicitly preferred for large-body integrated circuits (such as space-grade FPGAs, processors, and telemetry modules) operating in harsh environments where extreme thermal fluctuations and severe mechanical vibration are constant.

Flat Lug Lead (DPAK Tab)

A large, heat-dissipating backside drain tab of a DPAK (TO-252) surface-mount package into a dedicated flat, surface-mounting contact terminal. It serves as the primary path for drawing destructive heat away from the silicon die and distributes it directly into the copper planes of the printed circuit board. In standard power MOSFETs, this extended tab functions as the high-current electrical connection for the Drain terminal. Avoid applying a 1:1 ratio of solder paste to the flat lug pad area. Industry guidelines from manufacturers like onsemi recommend a windowpane or checkerboard stencil pattern covering roughly 60% of the tab area. This prevents component floating, misalignment, or "tombstoning" from excess solder. The Nominal Toe value is 0.35 mm and must have visible wetting after assembly. The Side and Heel values are very small and set to 0.03 to maintain alignment and prevent skewing. However, some voltage regulator DPAK devices produce additional heat and the manufacturer recommended pattern for the thermal pad size should be taken into consideration. To maximize heat transfer from the flat lug lead, stitch multiple thermal vias into the pad connecting to inner or bottom-layer ground/power planes. Due to the massive heat-sinking nature of the extended tab, hand-soldering requires a large thermal mass iron, a pre-heating hot plate, or a secondary heating source to ensure proper solder flow under the heel of the component.

Through-Hole

Through-hole leads rely on mechanical insertion through the substrate. Pre-forming the leads is a critical manufacturing step designed to establish a consistent component standoff height, provide strain relief, and mechanically lock the component to the board prior to wave or selective soldering.

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PCB Libraries Guideline : ODA Pad Stack Naming Convention

Sat, 15 Aug 2026 11:00:45 +0000

Author: Nick B
Subject: ODA Pad Stack Naming Convention
Posted: 15 Aug 2026 at 11:00am

The pad stack consists of combinations of letters and numbers that represent shape, or dimensions of lands on different layers of printed boards or documentation. The name of the pad stack needs to represent all the various combinations. This pad stack naming convention was created by Optimum Design Associates.

Name Derivation: A pad stack name is a deterministic function of the pad stack geometry and the selected naming convention. It is not an attribute stored on the pad stack. The name shall be regenerated whenever the geometry changes, whenever the selected naming convention changes, and at the point where library or CAD output is produced - regardless of how the pad stack was originally created.

A name may be overridden manually. An overridden name shall be flagged as such and shall be the only case in which a stored string survives regeneration.

The first part of the pad stack convention consists of a land shape. There are six basic land shape identifiers. Note: All alphabetical characters are "UPPER CASE". All numeric values are represented in Micrometer units. All numeric values are represented in micrometer units, zero padded to a minimum of four digits. This applies uniformly to every dimension in a pad stack name - pads, lands, solder mask, solder paste, corner radii, tolerances, offsets, holes, slots and drills alike. A value requiring more than four digits is written at its natural width (e.g. 12.00 mm becomes 12000). Conversion examples: 1.500 mm = 1500; 0.860 mm = 0860; 0.90 mm = 0900; 0.25 mm = 0250; 4.00 mm = 4000; 0.050 mm = 0050.

Land Shape Letters (used for the pad itself)

C = Circular
S = Square
R = Rectangle
B = Oblong
G = Octagonal
Example: SG1500 (octagonal surface mount land, 1.500 across flats); THP0900G1500 (0.90 plated hole, octagonal 1.500 pad)
Reserved. Octagonal lands appear in legacy library content, where a small octagonal pad was sometimes placed at the center of a hole below the drill size. Plated, non-plated and donut pad stack types now cover those cases. The letter remains defined so existing names stay readable, but octagonal lands are NOT produced by automatic generation. A pad that is genuinely octagonal shall be named as a custom pad stack under SU_.
F = Finger D Shape

Pad Stack Type Prefixes (combine with a land shape letter)

SR = SMD Rectangle
SRCR = Surface Rounded Corner Rectangle
THP = Through Hole Plated
THN = Through Hole Non-plated
SU = User Defined Contour
DC = Donut Circular outside diameter
IDC = Inside Donut Circular
TC = Thermal Circular
TS = Thermal Square
TB = Thermal Oblong
TR = Thermal Rectangle
MHP = Mounting Hole Plated
MHN = Mounting Hole Non-Plated
V = Via
FID = Fiducial

Illegal characters:

" " , ; : / \ [ ] ( ) . { } * & % # $ ! @ ^ =

Maximum length: A pad stack name shall not exceed 31 characters. Where a generated name would exceed the limit, generation shall fail with a diagnostic rather than emit a truncated or altered name.

Name Structure Order

SR2000X1000

Surface Mount Rectangle 2.000 X 1.000

THP0900C1500

Through-hole Plated 0.90 Hole, Circular 1.500 Pad

SRCR2430X2370X0050

Surface Rounded Corner Rectangle 2.430 long X 2.370 short X 0.050 corner radius

Modifier Order: Where more than one modifier applies, they are appended in this fixed order: 1. internal layer modifier (_INP); 2. solder paste modifiers (_SSP, _NSP, _TSP, _BSP); 3. solder mask modifiers (_1TO1, _SSM, _NSM, _TSM, _BSM, _STM, _SBM, _TNTT, _TNTB, _CAPT, _CAPB); 4. miscellaneous modifiers (_OFF, _TOL, _OBS, _PFIT, _UV, _PCH, _VT, _BWT). Example: MHP4000C7000_INP5200_SSM7200 (the internal layer pad callout precedes the mask callout).

Separator Convention

'X' is used to separate dimensions within a given shape, and '_' is used to separate the different aspects of the naming convention.

Example: SR0640X0630_SSM0660X0650 (Selective Solder Mask callout appended when the mask deviates from the standard overage of .05 on each side / .1 overall expansion. In this example, .01 on each side / .02 overall expansion is used.)

Shape Deviation: When a solder mask or solder paste layer is a DIFFERENT SHAPE from the copper pad, the callout carries the shape letter before the dimensions, so the layer is fully described: _SSM + shape letter + dimensions, and _SSP + shape letter + dimensions.

Example: SC0230_SSPRCR0250X0250X0050 - Circular copper 0.230, standard solder mask (no callout required), selective solder paste as a rounded corner rectangle 0.250 X 0.250 with 0.050 corner radius.

When the shape matches the copper, the shape letter is omitted and the dimensions alone follow the modifier, e.g. SR3000X1500_SSM3300X1800.

Per-layer corner radius: each layer carries its own shape AND its own corner radius, appended as a final X value in the same form used by SRCR. Copper, solder mask and solder paste may each be a different shape with a different corner radius, and each is described in its own callout. A corner radius stated for one layer never applies to another.

Dimension Order

Any time the pad is longer on one side than the other, the longest edge is presented first in the pad stack naming convention.

Solder Mask Modifiers

_NSM = None
_SSM = Selective Solder Mask. The mask departs from the default expansion and is described explicitly. Dimensions follow the modifier; where the mask shape also differs from the copper, the shape letter precedes the dimensions (see Shape Deviation).
_TSM = Top Side Only
_BSM = Bottom Side Only
_STM = Specified Top
_SBM = Specified Bottom
_TNTT = Tented Top
_TNTB = Tented Bottom
_CAPT = Via Cap Top
_CAPB = Via Cap Bottom
_1TO1 = Solder mask is the same size AND the same shape as the copper pad, with all other aspects of the pad stack standard (paste 1:1). Takes precedence over _SSM: a 1:1 mask is named _1TO1, never _SSM. If the paste also deviates, _1TO1 still applies to the mask and the paste is called out separately, in the order given under Modifier Order (paste precedes mask): SR0860X0250_SSP0700X0200_1TO1. A mask that matches the copper in size but NOT in shape is not 1:1 - use _SSM with the shape letter (see Shape Deviation).
Applicability of Modifiers: The solder mask and solder paste modifiers apply to ALL pad stack types - surface mount, through hole, mounting hole, via and fiducial - and to every layer within them. A modifier is appended any time a layer deviates from the default stated above, and only then. Paste present on a through-hole pad stack is a deviation and shall be called out.

Solder Paste Modifiers

_NSP = No Solder Paste
_SSP = Selective Solder Paste. The paste departs from the default 1:1 relationship with the copper and is described explicitly.
_TSP = Top Specified Paste
_BSP = Bottom Specified Paste
Applicability of Modifiers: The solder mask and solder paste modifiers apply to ALL pad stack types - surface mount, through hole, mounting hole, via and fiducial - and to every layer within them. A modifier is appended any time a layer deviates from the default stated above, and only then. Paste present on a through-hole pad stack is a deviation and shall be called out.

Layer and Size Modifiers

_INP = Inner Layer Pad Size
_BTP = Opposite/Bottom Side Pad. Used where the bottom side land of a through-hole, mounting hole or via pad stack differs in size from the top side land. Value is the bottom pad dimension.
Reserved. Asymmetric pad stacks are not currently part of our library and _BTP is NOT produced by automatic generation. The letter remains defined so legacy and hand-authored names stay valid. Where automatic generation encounters a pad stack whose bottom land differs from the top, it shall be named as a custom pad stack under SU_ rather than share a name with the symmetric variant.
_BOT = Bottom Surface Mount

Thermal and Plane Modifiers

Thermal Spoke Count = 4 Ties at 45° is default
TC or TS or TB or TR + D (Hole) + A (Annular) G (Gap) T (Tie) - TCD1250A0120G0100T0120
BTH = Buried Thermal
THRM = Via with Thermal Relief

Miscellaneous Modifiers

_OFF = Offset
_OBS = Keep-out/Obstruct
_N = Non-Plated Hole
_TOL (+tol)X(-tol) – TOL0105X0075 (+0.105 mm / -0.075 mm, four digit micrometre form for both values)
_VT = Via Tolerance
_PCH = Punched Hole
_PFIT = Press Fit
_UV = Microvia
_BWT = Bottom Wave Tech

Chamfered and Radius Corner Pad Stacks

Chamfered corner pad stacks are named as custom pad stacks using the SU_ prefix per the User Defined / Custom Pad Stacks section. Drawing the chamfer at the CAD tool footprint level instead remains permitted for hand-authored parts, but automatic generation shall always produce an SU_ name.

Radius cornered pads fall under B obrounds (4 corners) or F fingers (2 corners). Rounded corner rectangles (where the corner radius does not form a full obround or finger) use the SRCR prefix: SRCR + long side X short side X corner radius value (e.g., SRCR2430X2370X0050). Any other non-standard corner configuration would fall under SU custom pad/pad stack naming.

User Defined / Custom Pad Stacks

Named specifically since they won't be used generically and are seen as being used 1 to 1 with a part number or package.

SU__
SU = custom pad stack
FOOTPRINT NAME = the name of the footprint the pad stack belongs to, which already encodes manufacturer and package identity (e.g. INFINEON_PG-TSDSON-8-FL).
MFR = Manufacturer
MPN or PACKAGE ID = Manufacturer Part number or Manufacturer Package ID

n = a positive integer, starting at 1, assigned per DISTINCT custom pad stack within that footprint. Two pins whose custom pad stacks are identical in geometry across every layer share the same n; pad stacks that differ in any way receive different numbers. Numbers are assigned in ascending pin order of first appearance, so that rebuilding the same footprint always yields the same names.

Example: SU_INFINEON_PG-TSDSON-8-FL_1, SU_INFINEON_PG-TSDSON-8-FL_2

Manual variants such as L and R remain permitted for hand-authored pad stacks but shall not be produced automatically.

Alternate SU format

SU_ManufacturerPrefix_CaseCode_#

Example:

SU_TI_RRX0029B_1 (Texas Instruments, RRX0029B case code, pad variant 1)

Default Values

Solder Mask Size – 0.100 larger than pad
Paste Mask Size – 1:1 scale of pad size
Inner Layer Shape – Round internal pads for Square through-hole pad
Thermal Ties – 4 ties at 45 degrees
Via Thermals – Buried thermal (no relief)
Drill Tolerance – ± 0.075 mm (holes ≤ 2.50 mm) or ± 0.10 mm (holes > 2.50 mm)
Via Drill Tolerance – + 0.075 mm / - hole size
Standard Pad Stack: A pad stack is standard when its solder mask is the default 0.100 mm overall expansion of the copper in the same shape, and its solder paste is 1:1 with the copper in the same shape. A standard pad stack carries no mask or paste modifier in its name.
It follows that the presence of _1TO1, _SSM, _SSP, _NSM or _NSP is exactly equivalent to the pad stack being non-standard. The name and any reported standard/non-standard status must be derived from the same test and can never disagree.
Applicability of Defaults: The default solder mask expansion of 0.100 mm overall applies to EVERY layer that carries a mask opening - surface mount lands, through-hole pads, mounting holes, and opposite/bottom side layers alike. The default solder paste relationship of 1:1 applies wherever paste is present. Through-hole pad stacks carry no paste by default.

Individual Pad and Hole Naming Convention

In addition to the pad stack name, the individual pads and holes within a pad stack follow their own naming conventions. These names are derived from the parent pad stack name and describe the specific layer-level objects.

SMD Pad Naming

For surface mount pads, the individual pad name is derived from the pad stack name by removing the leading "S" prefix. The pad dimensions in the name remain identical to the pad stack.

Convention: Remove the "S" prefix from the pad stack name. The resulting name is assigned to the copper pad on most layers.

Solder Mask Pad: When solder mask uses the default expansion (0.05 mm per side / 0.10 mm overall), the mask pad name reflects the expanded dimensions using the same format.

Example: Pad stack SR0860X0250 → Copper pad name is R0860X0250 (assigned to most layers), Solder mask pad name is R0960X0350 (reflects the 0.05 mm per side expansion).

Through-Hole and Mounting Hole Naming

Holes within through-hole and mounting hole pad stacks are named to describe the hole shape, diameter, and plating status.

Convention: The hole name follows the format: Shape + Diameter + Plating Suffix.

Shape: "Rnd" for round holes.

Diameter: Expressed in millimeters (e.g., 0.40 for a 0.40 mm hole).

Plating Suffix: "P" for plated holes, "N" for non-plated holes.

Example: Rnd 0.40P = Round, 0.40 mm diameter, plated hole.

Example: Rnd 3.20N = Round, 3.20 mm diameter, non-plated hole.

Hole Tolerance Suffix

Default tolerance: ±0.075 mm for holes up to 2.50 mm, and ±0.10 mm for holes larger than 2.50 mm. When the default tolerance applies, no suffix is appended to the hole name.

Non-default tolerance: When a tolerance other than the default is required, a _TOL suffix is appended to the hole name. The suffix value is expressed in micrometers representing the ± tolerance.

Example: Rnd 0.40P_TOL0050 = Round, 0.40 mm, Plated, with ±0.05 mm tolerance (instead of the default ±0.075 mm).

Example: Rnd 3.00P_TOL0150 = Round, 3.00 mm, Plated, with ±0.15 mm tolerance (instead of the default ±0.10 mm).

Pad Stack Name Examples

Surface Mount Pads

Rectangle SMD 2.00 x 1.00 – SR2000X1000
Oblong SMD 3.00 x 1.50 – SB3000X1500
Square SMD 3.50 – SS3500
Circular SMD 1.00 – SC1000
Rounded Corner Rectangle SMD 2.430 x 2.370, 0.050 corner radius – SRCR2430X2370X0050
Rectangle with custom Solder Mask – SR3000X1500_SSM3300X1800
Rectangle with custom Solder Paste – SR3000X1500_SSP2700X1200
Rectangle with Offset Origin – SR3000X1500_OFF0500
Custom pad Texas Instruments RDM package left side – SU_TI_RDM_L

Through-hole Pads

0.90 Plated hole, Circular 1.50 pad – THP0900C1500
0.90 Plated hole, Square 1.50 pad – THP0900S1500
TH with Inner layer pad different size – THP0900C1500_INP1400
TH with Opposite side pad different size – THP0900C1500_BTP1700
0.90 non-plated hole, Circle 1.50 pad – THN0900C1500
Plated Oblong Slot 3.00 x 1.00, pad 4.00 x 2.00 – THP3000X1000B4000X2000

Individual Pad and Hole Name Examples

SR0860X0250 → Copper pad: R0860X0250, Solder mask pad: R0960X0350
SS3500 → Copper pad: S3500, Solder mask pad: S3600
THP0900C1500 → Hole: Rnd 0.90P (default tolerance ±0.075 mm, no suffix)
THP040C1000 → Hole: Rnd 0.40P_TOL0050 (non-default tolerance of ±0.050 mm)
THN320C5000 → Hole: Rnd 3.20N (non-plated, default tolerance ±0.10 mm)
MHP4000C7000 → Hole: Rnd 4.00P (default tolerance ±0.10 mm)

Vias

Standard via 0.50/0.25 – V0250C0500
Square via 0.50/0.25 – V0250S0500
Via with opposite size – V0250C0500_BTP0700
Blind via L1-L3 – V0150C0300 (layer in tool)
Via with thermal relief – V0250C0500_THRM

Mounting Holes

Plated MH 4.00 hole, 7.00 pad – MHP4000C7000
Non-Plated MH 4.00 hole – MHN4000
MH w/ inner layer & mask – MHP4000C7000_INP5200_SSM7200

Fiducials

Circular 1.00, mask 2.00, KO – FID_CELL_1000
Global fiducial – FID_GLOBAL

ODA Footprint Naming Convention

Footprint names follow IPC-7351 conventions where applicable. The material condition suffixes L, N, and M are used when the IPC nominal land pattern is selected.

IPC Nominal Land Pattern (L, N, M suffixes)

When the IPC nominal land pattern is used, the standard IPC material condition suffixes apply:

L = Least material condition (most solder fillet)
N = Nominal material condition
M = Most material condition (least solder fillet)

Example: SOT23-5P95_290X280X145L45X40N

IPC Standard Package with Manufacturer-Recommended Footprint (Q suffix)

If the package type is an IPC standard one but the manufacturer-recommended footprint is chosen instead, the Q material condition suffix is used per our standard in place of L, N, or M, followed by the manufacturer prefix and the case code.

Example: SOT23-5P95_290X280X145L45X40Q_TI_DBV0005A

Non-IPC Standard Package or RF Component (Manufacturer Prefix + Case Code)

If the package type is not an IPC standard one, or if it is an RF component, the manufacturer-recommended footprint is used and named with the manufacturer prefix and case code directly.

Example: TI_RRX0029B

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PCB Libraries Guideline : IPC-7352 Pad Stack Naming Convention

Sat, 15 Aug 2026 11:00:46 +0000

Author: Nick B
Subject: IPC-7352 Pad Stack Naming Convention
Posted: 15 Aug 2026 at 11:00am

The pad stack consists of combinations of letters and numbers that represent shape, or dimensions of lands on different layers of printed boards or documentation. The name of the pad stack needs to represent all the various combinations. These are used in combination with the land pattern conventions defined herein according to the rules established in the IPC-2220 Design standards.

All dimensions in this Naming Convention section are in "mm", unless otherwise noted.

The first part of the pad stack convention consists of a land shape. There are ten basic land shape identifiers. Note: All alphabetical characters are "lower case". This helps discriminate numeric values.

Basic Land Shape Letters

r = Rectangle
rr = Rounded Rectangle
cr = Chamfered Rectangle
b = Oblong
d = D Shape (Square on one end and Circular on the other end)
c = Circular
s = Square
rs = Rounded Square
cs = Chamfered Square
u = User Defined Contour (Irregular Shape)

Pad Stack Defaults

Solder Mask is 1:1 scale of the land size
Paste Mask is 1:1 scale of the land size
The Assembly Layer land is 1:1 scale of the land size
Inner Layer Land is the same shape as the outer layer land
The Primary and Secondary lands are the same size
The inner layer land shapes are Circular
Vias are Circular
Thermal ID, OD and Spoke Width sizes follow the IPC Level A, B or C
Plane Clearance Anti-pad size follows the IPC Level A, B or C
Thermals have 4 spokes
Mounting Holes are Circular

Note: Every board fabricator’s ability to register solder mask is different. The 1:1 scale solder mask covers the variation, and so long as manufacturers are building to specs such as IPC-6012 that say you can’t have mis-registration of the solder mask.

Illegal characters that cannot be used (Microsoft requirement) include " " , ; : / \ [ ] ( ) . { } * & % # $ ! @ ^ =

Examples utilizing the pad stack naming convention (all values are in metric units)

Note: Every number goes two places to the right and as many as needed to the left of the decimal

Examples: 1150 = 11.50 or 11500 μm, 150 = 1.50 or 1500 μm, 15 = 0.15 or 150 μm

c150h90 where "c" denotes a Circular land with a 1.50 diameter and H denotes a hole size of 0.90
c130_95 Donut pad where "c" denotes a Circular land with a 1.30 OD diameter and 95 denotes the ID diameter
c130_95hn70k147 Donut pad - "c" denotes a Circular land with a 1.30 OD diameter and 95 denotes the ID diameter and hn70 denotes hole, non-plated 0.70 diameter and k147 denotes a keep-out 1.47 diameter
v50h25 where a "v" denotes a via with a 0.50 land (default Circular land) and h denotes a 0.25 hole
s150h90 where "s" denotes a 1.50 Square land and h denotes a hole size of 0.90
s350 where "s" denotes a square SMT land size of 3.50
r200_100 where "r" denotes a Rectangular SMT land 2.00 land length X 1.00 land width
b300_150 where "b" denotes a SMT Oblong land size of 3.00 X 1.50
b400_200h100 where "b" denotes an Oblong land size of 4.00 length X 2.00 width and 1.00 hole
d300_150 where "d" denotes land with one circular end and one square end (looks like a D) 3.00 X 1.50
v30h15l1-3 where "v" denotes a 0.30 blind via with 0.15 Hole; 1 is the starting layer, 3 is the end layer
r200_100r5 = Rounded Rectangular 2.00 X 1.00 X 0.05 radius corners
r200_100c10 = Chamfered Rectangular 2.00 X 1.00 X 0.10 chamfered corners
v30h15l3-6 where "v" denotes a 0.30 buried via with 0.15 Hole; 3 is the starting layer, 6 is the end layer

Note: It is assumed that the through-hole pad stack has the same value as the mounted layer size and shape for -

Inner Layer
Opposite Side
Solder Mask
Solder Paste
Assembly Layers

It is also assumed that the "Plane Clearance" and "Thermal Relief" data follows the through-hole convention guidelines defined in the IPC-2221 and IPC-2222 standards.

Modifiers that are used when pad stack features are different than the defaults

These are the "Variants" or "Modifiers" that go after the basic pad stack naming convention.

These are used when the User needs to change the pad stack default values either by a different dimension or a different shape. In instances where shapes are different this becomes a two letter code with the modifier first followed by the land shape letter.

n = Non-plated Hole
z = Inner Layer land dimension if different than the land on primary layer
x = Special modifier used alone or following other modifiers for lands on opposite side to primary layer land dimension
t = Thermal Relief; if different than IPC standard pad stack – tid_od_sw for 4 spoke default
m = Solder Mask if different than default 1:1 scale of land
p = Solder Paste if different than default 1:1 scale of land
a = Assembly surface land if different than default 1:1 scale of land
y = Plane Clearance (Anti-pad) if the value is different than the Thermal OD
o = Offset Pad & Solder Mask with the same + / - value
om = Offset Solder Mask Only + / - value
op = Offset Paste Mask only + / - value
k = Keep-out
r = Radius for Rounded Rectangular Land Shape
c = Chamfer for Chamfered Rectangular Land Shape

Shape change is the last letter in the string prior to the dimension.

Other usage of the pad stack naming convention

USE of letter v: Vias can be named using the pad stack naming convention. Because most vias use lands that are circular in shape, the letter "v" will be used in place of the letter "c" in the pad stack naming convention. If this is not true the modifiers can be added after the letter "v" to signify shape or dimensional changes to this default.

USE of letter w: In addition to Vias the pad stack naming convention can also be used for defining mounting holes. The letter "w" shall be used to define the mounting hole characteristics and any associated lands used for the surface lands (either plated or un-plated)

Examples of double character modifiers:

ts = Thermal Square; if different than the top side land shape and dimensions
sw = Thermal spoke width
zs = Inner Layer Land Shape is Square (Note: The default is circular)
m0 = No Solder Mask
mxc = Solder Mask Opposite Side Circular
mx0 = Solder Mask Opposite Side No Solder Mask
p0 = No Paste Mask
xc = Opposite Side Circular
vs = Via with Square land
hn = Non-plated Hole

Modifier Example for Through-hole:

s150h90zs150 = where "s" is Square 1.50 land with 0.90 Hole with 1.50 inner (Z) Layer Square land
c150h90zc150 = where "c" is Circular 1.50 land with 0.90 Hole with 1.50 inner (Z) Layer Circular land

Modifier Examples for Vias:

vs50h25 where "vs" denotes a 0.50 Square Via with a 0.25 Hole
v50h25xs70 where "v" is 0.50 Circular Via with 0.25 Hole and 0.70 Square land on opposite side

Chamfered & Rounded corner modifiers are used to indicate which corner(s) are modified. Order of precedence has been given to the first 4 modifiers.

Modifiers:

bl – bottom left
br – bottom right
ul – upper left
ur – upper right
ulr – upper left & right
blr – bottom left & right
ubl – upper and bottom left
ubr – upper and bottom right

Rounded and Chamfered lands in "one corner" Modifier Examples:

r100_200rbl50 = rectangular land 1.00 x 2.00 with 0.50 radius for rounded corner in bottom left corner
r100_200rbr50 = rectangular land 1.00 x 2.00 with 0.50 radius for rounded corner in bottom right corner
r100_200rul50 = rectangular land 1.00 x 2.00 with 0.50 radius for rounded corner in upper left corner
r100_200rur50 = rectangular land 1.00 x 2.00 with 0.50 radius for rounded corner in upper right corner
r100_200cbl50 = rectangular land 1.00 x 2.00 with 0.50 chamfer for chamfer corner in bottom left corner
r100_200cbr50 = rectangular land 1.00 x 2.00 with 0.50 chamfer for chamfer corner in bottom right corner
r100_200cul50 = rectangular land 1.00 x 2.00 with 0.50 chamfer for chamfer corner in upper left corner
r100_200cur50 = rectangular land 1.00 x 2.00 with 0.50 chamfer for chamfer corner in upper right corner

Examples of a square land with 3 rounded and 1 chamfered corner (for Thermal Pad)

s300p190r25cul50 = square 3.00 land, square paste 1.90, corner radius 0.25, upper-left chamfer 0.50
s300p190r25cbl50 = square 3.00 land, square paste 1.90, corner radius 0.25, bottom-left chamfer 0.50

Chamfered and Rounded Rectangular with all four corners chamfered does not need a corner modifier. Modifier Examples with Rounded Rectangle Land Shape:

r200_100r50 = rectangular land 2.00 x 1.00 with 0.50 radius for rounded corners in all 4 corners
r200_100c50 = rectangular land 2.00 x 1.00 with 0.50 chamfer for chamfered corners in all 4 corners

Examples of a pad stack with Circular land with hole using various modifiers

c150h90 = Default pad stack with a 1.50 circular land with a 0.90 hole (no modifiers used)
c150hn90 = Default pad stack with a 1.50 circular land with a 0.90 non-plated hole (no modifiers used)
c150h90z140 = Inner layer land is smaller than external lands 1.40 or 0.10 smaller
c150h90z140x170 = Opposite side land is larger than top side land 1.70 or 0.20 larger
c150h90z140x170m165mx185 = Solder mask opening for top and bottom lands 0.15 larger for each
c150h90z140x170m165mX185a200 = Assembly drawing land in 0.50 larger than 1.50 primary land
c150h90z140x170m165mx185a200y300 = Plane clearance anti-pad diameter is 3.00
c150h90z140x170m165mx85 = Solder mask encroachment on opposite land by 0.65 smaller
c150h90m165 = adding a solder mask opening of 1.65 diameter or 0.15 larger than land
c150h90t150_180_40 = Thermal ID 1.50, OD 1.80, Spoke Width 0.40, Anti-pad 1.80
c150h90t150_180_40y200 = Anti-pad 2.00 (because the size is different than the Thermal OD)
c150h90t150_180_80_2 = Spoke Width 0.80 with 2 Spokes
c150h90m165t150_180_40 = Solder Mask 1.65

Examples of a pad stack with Oblong land with Slotted Hole

Sample - b = Oblong Land Shape then "X" dimension (length) then Underscore _ "Y" dimension (width)
b400_200h300_100 = Oblong land 4 length X 2 width with slotted hole size 3 X 1
b400_200hn300_100 = Oblong land 4 X 2 with non-plated slotted hole size 3 X 1

Examples of a SMT pad stack land using various modifiers

b300_150 = Default pad stack with a 3.00 length and 1.50 width land (no modifiers used)
b300_150m330_180 = Solder Mask is 0.30 larger than the land on all sides
b300_150m330_180p240_140 = Solder Paste is smaller by 0.10 width and 0.60 length
b300_150b-50 = Oblong Land 3.00 X 1.50 w/Offset Origin negative 0.50
r400_200pb430_230 = Rectangle SMT land 4.00 X 2.00 with an Oblong Paste Mask size of 4.30 X 2.30

Example of Thermal Pads for QFN, SON, QFP and SOP

Square Configurations

s480p4s152 = 4.80 Square Land with 4 Paste Mask Squares 1.52 each

s480p4s152cul50 = 4.80 Square Land with 4 Paste Mask Squares 1.52 each with 0.50 Chamfer in Upper Left corner

s480p4s152cul50r25 = 4.80 Square Land with 4 Paste Mask Squares 1.52 each with 0.50 Chamfer in Upper Left corner with 0.25 corner Radius

Example of a Mounting Hole

w700h400z520m720 = This is a Plated Through Mounting hole for a #6-32 screw using a 4.00 diameter hole and having a circular 7.00 land on the primary and secondary side of the board, with a solder mask clearance that is 0.20 larger than the 7.20 land. The internal lands are smaller that the external and are also circular 5.20 in diameter.
w700hn400z520m720 = Non-plated version

Example of a Local Fiducial for Fine Pitch SMT Components

c100m200k200 = Circular Land 1.00 with Solder Mask 2.00 with Keep-out 2.00
s100m200k200 = Square Land 1.00 with Solder Mask 2.00 with Keep-out 2.00

Example of Proportional Plated Through-hole Pad Stack

c150h100 = 1.50 circular pad with 1.00 hole with 1.50 solder mask with 1.50 plane clearance with 1.50 assembly outline with Thermal Relief w/4 spokes 0.40 width with ID 1.50 and OD 1.80

Example of Proportional Non-plated Through-hole Pad Stack

c100hn150 = 1.00 circular pad with 1.50 hole "non-plated" with 1.50 solder mask with 2.35 plane clearance with 2.10 keep-out

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PCB Libraries Guideline : IPC-7352 Footprint Naming Convention: Through-hole

Sat, 15 Aug 2026 11:00:47 +0000

Author: Nick B
Subject: IPC-7352 Footprint Naming Convention: Through-hole
Posted: 15 Aug 2026 at 11:00am

The land pattern naming convention uses component dimensions to derive the land pattern name.

The first 3 - 6 characters in the land pattern name describe the component family.

The first number in the land pattern name refers to the Lead Spacing or hole to hole location to insert the component lead.

All numbers that follow the Lead Spacing are component dimensions.

These characters are used as component body identifiers that precede the value and this is the priority order of the component body identifiers –

P = Pitch for components with more than two leads
W = Maximum Lead Width (or Component Lead Diameter)
L = Body Length for horizontal mounting
D = Body Diameter for round component body
T = Body Thickness for rectangular component body
H = Height for vertically mounted components
Q = Pin Quantity for components with more than two leads
R = Number of Rows for connectors

Notes:

All component body values are in millimeters and go two places to the right of the decimal point and no leading zeros.

All Complexity Levels used in the examples are "B".

Component, Category	Land Pattern Name
Capacitors, Non-Polarized Axial Diameter Horizontal Mounting	CAPAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Capacitors, Non-Polarized Axial Rectangular	CAPAR + Lead Spacing + W Lead Width + L Body Length + T Body thickness + H Body Height
Capacitors, Non-Polarized Axial Diameter Vertical Mounting	CAPADV + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Capacitors, Non-Polarized Axial Rect. Vert. Mtg.	CAPARV + Lead Spacing + W Lead Width + L Body Length + T Body Thickness + H Body Height
Capacitors, Non-Polarized Radial Diameter	CAPRD + Lead Spacing + W Lead Width + D Body Diameter + H Body Height
Capacitors, Non-Polarized Radial Rectangular	CAPRR + Lead Spacing + W Lead Width + L Body Length + T Body thickness + H Body Height
Capacitors, Non-Polarized Radial Disk Button	CAPRB + Lead Spacing + W Lead Width + L Body Length + T Body thickness + H Body Height
Capacitors, Polarized Axial Diameter Horizontal Mounting	CAPPAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Capacitor, Polarized Radial Diameter	CAPPRD + Lead Spacing + W Lead Width + D Body Diameter + H Body Height
Diodes, Axial Diameter Horizontal Mounting	DIOAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Diodes, Axial Diameter Vertical Mounting	DIOADV + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Dual-In-Line Packages	DIP + Lead Span + W Lead Width + P Pin Pitch + L Body Length + H Component Height + Q Pin Qty
Dual-In-Line Sockets	DIPS + Lead Span + W Lead Width + P Pin Pitch + L Body Length + H Component Height + Q Pin Qty
Headers, Vertical	HDRV + Lead Span + W Lead Width + P Pin Pitch + R Pins per Row + L Body Length + T Body Thickness + H Height
Headers, Right Angle	HDRRA + Lead Span + W Lead Width + P Pin Pitch + R Pins per Row + L Body Length + T Body Thickness + H Height
Inductors, Axial Diameter Horizontal Mounting	INDAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Inductors, Axial Diameter Vertical Mounting	INDADV + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Inductors, Non-Polarized, Radial Diameter	INDRD + Lead Spacing + W Lead Width + D Body Diameter + H Body Height
Inductors, Polarized, Radial Diameter	INDPRD + Lead Spacing + W Lead Width + D Body Diameter + H Body Height
Jumpers, Wire	JUMP + Lead Spacing + W Lead Width
Mounting Holes Plated with Support Pad	MTGP + Pad Size + H Hole Size + Z Inner Layer Pad Size
Mounting Holes Non-Plated With Support Pad	MTGNP + Pad Size + H Hole Size + Z Inner Layer Pad Size
Mounting Holes Non-Plated Without Support Pad	MTGNP + Pad Size + H Hole Size + Z Inner Layer Pad Size + K Keep-out Diameter
Mounting Holes Plated with 8 Vias	MTGP + Pad Size + H Hole Size + Z Inner Layer Pad Size + 8 Vias
Pin Grid Array’s	PGA + Pin Qty + P Pitch + C Pin Columns + R Pin Rows + L Body Length X Body Width + H Component Height
Resistors, Axial Diameter Horizontal Mounting	RESAD + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Resistors, Axial Diameter Vertical Mounting	RESADV + Lead Spacing + W Lead Width + L Body Length + D Body Diameter
Resistors, Axial Rectangular Horizontal Mounting	RESAR + Lead Spacing + W Lead Width + L Body Length + T Body thickness + H Body Height
Single-In-Line Packages	SIP + Body Width + W Lead Width + P Pin Pitch + L Body Length + H Component Height + Q Pin Qty
Test Points, Round Land	TP + Lead Width
Test Points, Square Land	TPS + Lead Width
Test Points, Top Land Round & Bottom Land Square	TPRS + Lead Width
Wire	PAD + Wire Width

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PCB Libraries Guideline : PCBL Footprint Naming Convention: Surface Mount

Sat, 15 Aug 2026 11:00:48 +0000

Author: Nick B
Subject: PCBL Footprint Naming Convention: Surface Mount
Posted: 15 Aug 2026 at 11:00am

Common package types and their respective naming conventions are listed below.

Ball Grid Array’s with Alphanumeric Rows	BGA + Pin Qty. + C or N + P Pitch _ Ball Columns X Ball Rows _ Body Length X Width X Height + B Ball Diameter
Ball Grid Array’s with Alphanumeric Columns	BGA + Pin Qty. + C or N + P Pitch + A + Ball Columns X Ball Rows _ Body Length X Width X Height + B Ball Diameter
BGA w/Dual Pitch	BGA + Pin Qty. + C or N + P Col Pitch X Row Pitch _ Ball Columns X Ball Rows _ Body Length X Width X Height + B Ball Diameter
BGA w/Staggered Pins	BGAS + Pin Qty. + C or N + P Pitch _ Ball Columns X Ball Rows _ Body Length X Width X Height + B Ball Diameter
Capacitors, Aluminum Electrolytic	CAPAE + Base Body Size X Height + L Lead Length X Width
Capacitors, Chip, Array, Concave	CAPCAV + Pin Qty. + P Pitch _ + Body Length X Width X Height + L Lead Length X Width
Capacitors, Chip, Array, Flat	CAPCAF + Pin Qty. + P Pitch _ + Body Length X Width X Height + L Lead Length X Width
Capacitors, Chip	CAPC + Body Length X Width X Height + L Lead Length
Capacitors, Dual Flat No-lead	CAPDFN + Body Length X Width X Height + L Lead Length X Width
Capacitors, Molded	CAPM + Lead Span X Body Width X Height + L Lead Length X Width
Capacitors, Polarized, Chip	CAPPC + Body Length X Width X Height + L Lead Length
Capacitors, Polarized, Dual Flat No-lead	CAPPDFN + Body Length X Width X Height + L Lead Length X Width
Capacitors, Polarized, Molded	CAPPM + Lead Span X Body Width X Height + L Lead Length X Width
Capacitors, Side Concave, 2 Pin	CAPSC + Body Length X Height + L Lead Length X Width
Ceramic Flat Packages	CFP + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Column Grid Array, Circular Lead	CGA + Pin Qty. P Pitch _ Pin Columns X Pin Rows _ Body Length X Width X Height + L Diameter
Pillar Column Grid Array	PCGA + Pin Qty. P Pitch _ Pin Columns X Pin Rows _ Body Length X Width X Height + L Diameter
Crystals (2 leads)	XTAL + Body Length X Width X Height + L Lead Length X Width
Crystals, Dual Flat No-lead	XTALDFN + Body Length X Width X Height + L Lead Length X Width
Crystals, Side Concave	XTALSC + Body Length X Height + L Lead Length X Width
Diodes, Chip	DIOC + Body Length X Width X Height + L Lead Length
Diodes, Dual Flat No-lead	DIODFN + Pin Qty. _ Body Length X Width X Height + L Lead Length X Width
Diodes, Molded	DIOM + Lead Span X Body Width X Height + L Lead Length X Width
Diodes, Non-polarized, Chip	DIONC + Lead Span X Body Width X Height + L Lead Length
Diodes, Non-polarized, Dual Flat No-lead	DIONDFN + Pin Qty. _ Body Length X Width X Height + L Lead Length X Width
Diodes, Non-polarized, Molded	DIONM + Lead Span X Body Width X Height + L Lead Length X Width
Diodes, MELF	DIOMELF + Body Length + Diameter + L Lead Length
Diodes, Side Concave	DIOSC + Body Length X Width X Height + L Lead Length
Diodes, Side Concave, 4 Pin	DIOSC4 + P Pitch _ Body Length X Width X Height + L Lead Length
Diodes, Small Outline Flat Lead, 2 Pin	SODFL + Lead Span X Body Width X Height + L Lead Length X Width
Diodes, Small Outline Flat Lead, 3 - 6 Pin	DIOSOFL + Pin Qty. + P Pitch _ + Lead Span X Body Height + L Lead Length X Width
DPAK	DPAK + Pin Qty. + P Pitch _ Lead Span X Height + L Lead Length X Width + T Thermal Tab Pad Length X Width
Ferrite Bead, Chip	BEADC + Body Length X Width X Height + L Lead Length
Fuses, Chip	FUSC + Body Length X Width X Height + L Lead Length
Fuses, Dual Flat No-Lead	FUSDFN + Body Length X Width X Height + L Lead Length X Lead Width
Fuses, Molded	FUSM + Lead Span X Body Width X Height + L Lead Length X Lead Width
Fuses, Side Concave	FUSSC + Body Length X Height + L Lead Length X Width
IC, Small Outline Package, Flat Lead	SOPFL + Pin Qty. + P Pitch _ + Lead Span X Body Height + L Lead Length X Width
Inductors, Chip	INDC + Body Length X Width X Height + L Lead Length
Inductors, Chip, Array, Concave	INDCAV + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Inductors, Chip, Array, Flat	INDCAF + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Inductors, Dual Flat No-lead	INDDFN + Body Length X Width X Height + L Lead Length X Width
Inductors, Molded	INDM + Lead Span X Body Width X Height + L Lead Length X Width
Inductors, Precision, Molded	INDPM + Lead Span X Body Width X Height + L Lead Length X Width
Inductors, Side Concave	INDSC + Body Length X Height + L Lead Length X Width
Integrated Circuit, Small Outline, Flat Lead, 3 - 6 pin	ICSOFL + Pin Qty. + P Pitch _ + Lead Span X Body Height + L Lead Length X Width
Land Grid Array, Circular Lead	LGA + Pin Qty. + C + P Pitch _ Pin Columns X Pin Rows _ Body Length X Width X Height + L Lead Diameter
Land Grid Array, Square Lead	LGA + Pin Qty. + S + P Pitch _ Pin Columns X Pin Rows _ Body Length X Width X Height + L Lead Size
LED’s, Chip	LEDC + Body Length + Width X Height + L Lead Length
LED’s, Dual Flat No-lead	LEDDFN + Body Length X Width X Height + L Lead Length X Width
LED’s, Molded	LEDM + Lead Span X Body Width X Height + L Lead Length X Width
LED’s, Side Concave	LEDSC + Body Length X Height + L Lead Length X Width
LED’s, Side Concave, 4 Pin	LEDSC4 + P Pitch _ Body Length X Height + L Lead Length X Width
Oscillators, Dual Flat No-Lead (4-pin)	OSCDFN4 _ Body Length X Width X Height + L Lead Length X Width
Oscillators, Side Concave	OSCSC + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Oscillators, Side Flat	OSCSF + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Oscillators, J-Lead	OSCJ + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Width
Oscillators, L-Bend Lead	OSCL + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Oscillators, Corner Concave	OSCCC + Body Length X Width X Height + L Lead Length X Width
Plastic Leaded Chip Carriers	PLCC + Pin Qty. + P Pitch _ Lead Span L1 X Lead Span L2 Nominal X Height + L Lead Width
Plastic Leaded Chip Carrier Sockets Square	PLCCS + Pin Qty. + P Pitch _ Lead Span L1 X Lead Span L2 Nominal X Height + L Lead Width
Pull-back Small Outline No-lead	PSON + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width + T Thermal Pad Length X Width
Pull-back Quad Flat No-lead	PQFN + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width + T Thermal Pad Length X Width
Quad Flat Packages	QFP + Pin Qty. + P Pitch _ Lead Span L1 X Lead Span L2 Nominal X Height + L Lead Length X Width + T Thermal Pad Length X Width
Ceramic Quad Flat Packages	CQFP + Pin Qty. + P Pitch _ Lead Span L1 X Lead Span L2 Nominal X Height + L Lead Length X Width
Quad Flat No-lead	QFN + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width + T Thermal Pad Length X Width
Quad Leadless Ceramic Chip Carriers	LCC + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Quad Leadless Ceramic Chip Carriers (Pin 1 on Side)	LCCS + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Chip	RESC + Body Length X Width X Height + L Lead Width
Resistors, Chip, Array, Concave	RESCAV + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Chip, Array, Convex, E-Version (Even Pin Size)	RESCAXE + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Chip, Array, Convex, S-Version (Side Pins Diff)	RESCAXS + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Chip, Array, Flat	RESCAF + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width
Resistors, Dual Flat No-lead	RESDFN + Pin Qty. _ Body Length X Width X Height + L Lead Length X Width
Resistors, MELF	RESMELF + Body Length + Diameter + L Lead Width
Resistors, Molded	RESM + Lead Span X Body Width X Height + L Lead Length X Width
Resistors, Side Concave	RESSC + Body Length X Width X Height + L Lead Length X Width
Small Outline IC, J-Leaded	SOJ + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Small Outline IC, L-Leaded	SOL + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Small Outline Integrated Circuit, (50 mil Pitch SOIC)	SOIC + Pin Qty. + P Pitch _ Body Length X Lead Span X Height + L Lead Length X Width
Small Outline Packages	SOP + Pin Qty. + P Pitch _ Body Length X Lead Span X Body Height + L Lead Length X Width + T Thermal Pad Length X Width
Small Outline No-lead	SON + Pin Qty. + P Pitch _ Body Length X Width X Height + L Lead Length X Width + T Thermal Pad Length X Width
Small Outline Diode	SOD + Lead Span X Body Width X Height + L Lead Length X Width
SOT143	SOT143 + P Pitch _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT223	SOT223 + Pin Qty. + P Pitch _ Body Length X Lead Span X Body Height + L Lead Length X Width
Thermistors, Chip	THRMC + Body Length + Width X Height + L Lead Width
Transistors, Small Outline, Flat Lead, 3 - 6 pin	TRXSOFL + Pin Qty. + P Pitch _ + Lead Span X Body Length X Body Height + L Lead Length X Width
Transistors, Dual Flat No-lead	TRXDFN + Pin Qty. _ Body Length X Body Width X Height + L Lead Length X Width
Varistors, Chip	VARC + Body Length X Width X Height + L Lead Width

SOT23 Form Factor Packages (EIA SOT & JEITA SC)

SOT23-3	SOT23-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC59-3	SC59-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT23-5	SOT23-5P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC59-5	SC59-5P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT23-6	SOT23-6P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC74	SC74-6P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT28	SOT28-8P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC70-8	SC70-8P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT323	SOT323-3P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC70	SC70-3P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT346	SOT346-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC59A	SC59-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT346T	SOT346T-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC96	SC96-3P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT353	SOT353 -5P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC88A	SC88A-5P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT363	SOT363-6P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC88	SC88-6P65 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT416	SOT416-3P50 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC75	SC75-3P50 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SOT753	SOT753 -5P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width
SC74A	SC74A-5P95 _ Body Length X Lead Span X Body Height + L Lead Length X Width

Note: All footprint dimensional values are Nominal except Height is Maximum

All dimensions are in Metric Units
All Lead Span and Height numbers go two places past the decimal point and "include" trailing Zero
All Lead Span and Body Sizes go two place before the decimal point and "remove" leading Zeros
All Chip Component Body Sizes are one place to each side of the decimal point
Pitch Values are two places to the right & left of decimal point with no leading Zeros but include trailing zeros

Land Pattern Naming Convention: Each land pattern in IPC-7351 is specified by a unique name that must convey the package family type, pin quantity, pin pitch, body length and width dimensions, terminal lead span, terminal lead length and width and thermal pad dimensions whenever applicable. Other fields in a land pattern name are optional and are discussed below.

The following notes provide guidance on using the tables above. Specific characters are reserved for use in the naming convention to denote or separate certain fields:

P : Prefixes pin pitch. For example, P80 specifies a 0.80 mm pitch between terminations.
L : Prefixes nominal lead dimensions
T : Prefixes thermal tab dimensions
X : Dimension separator. For example, 0.80 mm by 1.50 mm is denoted 80X150
C, N : Denote Collapsing and Non-collapsing balls respectively when specifying a BGA land pattern
_ : Underscore is a field separator between pin quantity and/or pin pitch and the package body dimensions
- : Dash is a field separator between pin quantity in hidden and deleted pin components
+ : Plus denotes "in addition to". The plus "+" symbol does not actually appear in the land pattern name, it is only used to assist in reading the information.

Additional notes:

All dimensions are metric units
All dimensions are nominal except height is maximum
All numeric values are two places before and after the decimal point and "remove" leading Zeros
If there is no pin quantity in the Land Pattern Name it is assumed that the pin quantity is 2
Thermal Tabs are included in the Pin Quantity

Additional and Optional Fields:

The suffix letters "L", "M", and "N" are used to signify when the land protrusion is at their minimum (least), maximum (most), or median (nominal) protrusion and appear as the last character. The 3 Density Levels are defined as follows:

M = Maximum (Most) Material Condition (Density Level A)
N = Median (Nominal) Material Condition (Density Level B)
L = Minimum (Least) Material Condition (Density Level C)

If no Density Level suffix is provided, then the land pattern either follows the component manufacturer's recommended pattern or a custom land pattern for use with multiple component manufacturer’s packages in the same component family.

Additional suffices for JEDEC Standard parts that have several alternate packages are as follows:

AA, AB, AC JEDEC Component Identifier (used primarily on Semiconductor packages).

Additional suffixes for alternate components that do not follow the JEDEC standard are as follows (these are located before the Density Level suffix):

"A" - Alternate Component letter is used when component package nominal dimensions are the same for two packages but the package tolerances are different enough to create a unique land pattern to avoid land pattern name duplication.

Ball Grid Array (BGA) packages may require land pattern names that indicate a difference in pitch between balls in the rows vs. balls in the columns. These are often referred to as a “dual pitch BGA”. For example, the BGA land pattern name of BGA48C80X100P6X8_900X1200X120 conveys that the pitch 0.80 mm between columns and 0.10 mm between rows.

Note: In this example, Pin A1 is assumed to be located in the Lower left when viewing the package from the top view. A 90 rotation of the BGA swaps the definition of Rows and Columns.

A pin order or pin quantity modifier shall be added to the component package type specification to convey reverse pin ordering, hidden pins, or deleted pins.

SOP20R: 20 pin part, Reverse Pin Order
SOT143R: Reverse Pin Order
SOP20-24: 20 pin part in a 24 pin package. The pins are numbered 1 – 24 the hidden pins are skipped over. The schematic symbol displays up to 24 pins.
SOP24-20: 20 pin part in a 24 pin package. The pins are numbered 1 – 20 the deleted pins are removed. The schematic symbol displays 20 pins.

Land Pattern Naming for Non-conforming Packages: A large number of component packages are unique, non-standard packages or unique connectors. These component packages do not fit into a standard land pattern name due to their unique features. Therefore, in order to have a single land pat tern naming convention that covers every component package in the electronics industry, the land pattern name must be associated with the component manufacturer and their part number or case code as shown below:

ManufacturerNameAbbreviation_ManufacturerPartNumber or

ManufacturerNameAbbreviation_ManufacturerCaseCode

All special characters used in the part number will be replaced with a hyphen "-" except periods "." will be replaced with an underscore "_".

If the component package or connector is unique and has a single manufacturer part number, then Part Number would be used to generate the Land Pattern Name

The component is a standard package and is associated with multiple manufacturer part numbers then manufacturer Case Code would be used to generate the Land Pattern Name

Examples:

FOXCONN_JFM38U1A-2PVT-4F TI_RKG41 CK_CRD16CM0SB

MOLEX_67503-1020 MAXIM_L1053-H2 ABRACON_ABM11

SAMTEC_QTH-060-01-L-D-A CUI_SJ-3566AN AMPHENOL_101-00565-64

For reference, various unique footprints are shown below that are non-conforming with Tables above.

This is the footprint of SAMTEC_QTH-060-01-L-D-A, an connector with plated mounting and non-plated alignment holes.

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PCB Libraries Guideline : Courtyard Excess

Sat, 15 Aug 2026 11:00:49 +0000

Author: Nick B
Subject: Courtyard Excess
Posted: 15 Aug 2026 at 11:00am

In PCB design, courtyard excess refers to the specific clearance area between the combined physical boundary of a component (body and pads) and the outer boundary of its placement courtyard. This buffer zone ensures that components have sufficient space for manufacturing tolerances, mechanical assembly, and potential rework without interfering with neighboring parts.

Courtyards should not overlap in the part placement. Courtyards are used in a variety of ways in different CAD tools. The courtyard excess values are defined in the 3-Tier density levels for surface mount components.

Least Density Level: 0.10 mm
Nominal Density Level: 0.20 mm
Most Density Level: 0.40 mm

The default courtyard outline maps to the pads and the Maximum package body dimensions. Mapping the courtyard outline to Maximum package body dimensions is affected by package tolerances. Package tolerances vary between component manufacturers affecting the resulting courtyard excess value. There is a Drafting Option switch to change the courtyard outline to map to the Nominal package body. Using Nominal package body is not affected by package tolerances and provides a consistent courtyard excess for all footprints regardless of the package tolerance values. IPC-7352 only recommends mapping to the Maximum package dimensions, but industry consensus is leaning toward using Nominal package dimensions because component manufacturer tolerances are sometimes too robust and unrealistic.

For through-hole component footprints, the courtyard excess is set to a single value because through-hole technology only has a single density level. The typical through-hole courtyard excess is 0.25 mm.

Requirements for Special Component Types

While generic components follow standard density levels, certain parts require larger excess values due to their physical height or specialized assembly needs:

BGA/WLCSP Devices: Typically require a 1.00 mm clearance to allow for optical inspection of balls and specialized rework heat application.
Connectors: Recommended excess is often 0.50 mm to account for mating plug clearances and physical handling during insertion.
Tall Components: Canned capacitors and crystals often utilize a 0.50 mm excess to prevent tall bodies from shadowing or obstructing the placement of adjacent parts.
Large Non-Standard Packages: For parts with any dimension over 10 mm, an excess of 0.50 mm is often recommended to accommodate bulky rework equipment.

Why Courtyard Excess is Critical

Manufacturing Tolerances: Accounts for registration errors during board fabrication and pick-and-place machine accuracy.
Rework Accessibility: Provides enough room for tweezers, vacuum nozzles, or soldering iron tips to extract and replace a defective component without damaging neighbors.
Collision Prevention: Ensures that the 3D bodies of components do not clash during automated assembly.
Solder Joint Inspection: Allows sufficient visual or automated optical inspection (AOI) access to the solder fillets.

The courtyard excess for component body and footprint pads can be independently adjusted. The main reason for 2 different settings is because the physical package can move in any direction during reflow oven, but the pads never move. Typically, the courtyard to body and courtyard to pad are set to the same value for symmetry, but they can be adjusted to the individual user.

There is also a manufacturing allowance provided by the assembly shop as a courtyard-to-courtyard clearance rule. In the average case, courtyards can be bumped next to each other. But the assembly shop may provide a spacing rule between courtyards, and this is referred to as the manufacturing zone.

The original courtyard shape in IPC-SM-782 was rectangular. The contour courtyard was introduced in the IPC-7351 guideline. The Footprint Expert can automatically switch between either courtyard outline shape, and rebuild your entire library with whatever you choose.

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