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  <pubDate>Mon, 06 Apr 2026 22:43:46 +0000</pubDate>
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   <title><![CDATA[FP Calculator Silkscreen Issue : Hello!I&amp;#039;m making a footprint...]]></title>
   <link>https://www.PCBLibraries.com/forum/fp-calculator-silkscreen-issue_topic3423_post13658.html#13658</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=7730">kvkoskin</a><br /><strong>Subject:</strong> 3423<br /><strong>Posted:</strong> 12 Sep 2024 at 4:15am<br /><br />Hello!<div><br></div><div>I'm making a footprint for the nRF9151 with FP Calculator. There seems to be some calculation issue with the silkscreen clearance.</div><div><br></div><div>This is the silkscreen with 0.200&nbsp;mm offset:</div><div><br></div><div><img src="uploads/7730/clearance0200_r_2024-09-12_04-01-59.png" height="273" width="300" border="0" alt="Clearance 0.200mm" title="Clearance 0.200mm" /></div><div><br></div><div><br></div><div>This is with 0.199&nbsp;mm offset.</div><div><br></div><div><img src="uploads/7730/clearance0199_r.png" height="268" width="300" border="0" /><br></div><div><br></div><div>The pins are 0.20 mm from the component edges.&nbsp;</div><div><br></div><div>Why silkscreen is removed from left and right edges with default settings?</div><div><br></div><div>This is done with "v.11, 9/6/2024". Happy to provide further info as needed.</div><div><br></div>]]>
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   <pubDate>Thu, 12 Sep 2024 04:15:43 +0000</pubDate>
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