PCB Libraries Forum : Paste Mask Thermal Tab DPAK https://www.PCBLibraries.com/forum/ Mon, 06 Apr 2026 20:40:58 +0000 Fri, 14 Apr 2023 09:33:21 +0000 http://blogs.law.harvard.edu/tech/rss Web Wiz Forums 12.07 360 https://www.PCBLibraries.com/forum/RSS_post_feed.asp?TID=3257 <![CDATA[PCB Libraries Forum]]> https://www.PCBLibraries.com/forum/forum_images/PCBLForumLogo.gif https://www.PCBLibraries.com/forum/ <![CDATA[Paste Mask Thermal Tab DPAK : There is a new V23.07 Footprint...]]> https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12979.html#12979 Author: Tom H
Subject: 3257
Posted: 14 Apr 2023 at 9:33am

There is a new V23.07 Footprint Expert Enterprise pre-release today that adds more features to the DPAK component family. 

www.pcblibraries.com/downloads

Fixed for DPAKs

Negative tab terminal value L1 (shown as tab protrusionbeyond the body) is now allowed.

(meaning L1 becomes the pull back distance of thethermal tab and the tab can be entirely under the body).



If the L1 dimension is less than zero (tab is entirelyunder the body) and set back from the D dimension)

  • Tab terminal will follow ‘Flat-No-Lead bottom only’ terminal rules (for periphery).
  • Solder and paste mask rules will reflect ‘Tab Pattern’ rules.
  • The ‘D’ dimension will apply from the gullwing terminals to the edge of the body.

]]> Fri, 14 Apr 2023 09:33:21 +0000 https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12979.html#12979 <![CDATA[Paste Mask Thermal Tab DPAK : I also found the calculator for...]]> https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12978.html#12978 Author: phil.holden
Subject: 3257
Posted: 14 Apr 2023 at 1:41am

I also found the calculator for the DPAK a bit more logical.... It was perhaps that the datasheet dimensioning was a lot more in-line with the calculator as i'm not sure if you have made any changes to that part? 

Previously when creating DPAK footprints i have always had to make numerous calculations in order to add the numbers in the format that the calculator wants, if that makes sense? ]]> Fri, 14 Apr 2023 01:41:32 +0000 https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12978.html#12978 <![CDATA[Paste Mask Thermal Tab DPAK : Makes total sense now you explain...]]> https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12977.html#12977 Author: phil.holden
Subject: 3257
Posted: 14 Apr 2023 at 1:37am

Makes total sense now you explain the initial mistake. Thanks for the explanation.]]> Fri, 14 Apr 2023 01:37:51 +0000 https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12977.html#12977 <![CDATA[Paste Mask Thermal Tab DPAK : We are working on a new feature...]]> https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12974.html#12974 Author: Tom H
Subject: 3257
Posted: 13 Apr 2023 at 9:38am

We are working on a new feature for the DPAK to allow a negative value for the L1 dimension. 

This removes to Toe Solder Joint and turns the Flat Lug Lead into a Thermal Pad. 

If the large tab on the DPAK is 100% under the package it will have a checker board pattern. 

]]> Thu, 13 Apr 2023 09:38:17 +0000 https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12974.html#12974 <![CDATA[Paste Mask Thermal Tab DPAK : We originally made a mistake and...]]> https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12973.html#12973 Author: Tom H
Subject: 3257
Posted: 13 Apr 2023 at 8:59am

We originally made a mistake and identified the large DPAK pad as a thermal pad with a checker board paste mask. It's actually a Flat Lug Lead. 

We're now following IPC J-STD-001 standard and it requires visible solder wetting on the end of the large tab. A Flat Lug Lead has a Toe solder joint and the pad is larger than the flat lug so the solder needs to run out to the end of the flat lug onto the extended pad to form a solder fillet. Wetting is evident (visible). 

A Thermal Pad is 100% under the package body and has no Toe, Heel or Side solder joint goals. There is no where for the solder to flow. i.e.: There is no evidence of visible wetting on a thermal tab. 

]]> Thu, 13 Apr 2023 08:59:19 +0000 https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12973.html#12973 <![CDATA[Paste Mask Thermal Tab DPAK : Hi Tom,I have used the latest...]]> https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12971.html#12971 Author: phil.holden
Subject: 3257
Posted: 13 Apr 2023 at 2:38am

Hi Tom,

I have used the latest Enterprise Edition 23.06 to create a D2PAK footprint. 

I have noticed that the 50% Paste Mask checkboard is no longer being applied. Is there a reason for the change? 

I noticed in the release notes of an earlier version it mentioned something about the tab being identified as 'mechanical' rather than 'thermal'. 

Would this mean that the thermal pad pattern would no longer be applied to DPAK thermal tabs?



]]> Thu, 13 Apr 2023 02:38:05 +0000 https://www.PCBLibraries.com/forum/paste-mask-thermal-tab-dpak_topic3257_post12971.html#12971