PCB Libraries Forum : Mapping Silkscreen Outline to Body https://www.PCBLibraries.com/forum/ Sun, 05 Apr 2026 05:04:26 +0000 Mon, 13 Apr 2015 12:09:04 +0000 http://blogs.law.harvard.edu/tech/rss Web Wiz Forums 12.07 360 https://www.PCBLibraries.com/forum/RSS_post_feed.asp?TID=1645 <![CDATA[PCB Libraries Forum]]> https://www.PCBLibraries.com/forum/forum_images/PCBLForumLogo.gif https://www.PCBLibraries.com/forum/ <![CDATA[Mapping Silkscreen Outline to Body : We&#039;ll be going over every...]]> https://www.PCBLibraries.com/forum/mapping-silkscreen-outline-to-body_topic1645_post6726.html#6726 Author: Tom H
Subject: 1645
Posted: 13 Apr 2015 at 12:09pm

We'll be going over every component family in the next 3 weeks to insure that they all follow the same rules and guidelines. This will be released in V2015.11 the 1st week of May.
 
]]> Mon, 13 Apr 2015 12:09:04 +0000 https://www.PCBLibraries.com/forum/mapping-silkscreen-outline-to-body_topic1645_post6726.html#6726 <![CDATA[Mapping Silkscreen Outline to Body : You are offering to choose whether...]]> https://www.PCBLibraries.com/forum/mapping-silkscreen-outline-to-body_topic1645_post6711.html#6711 Author: JJonas
Subject: 1645
Posted: 11 Apr 2015 at 10:43pm

You are offering to choose whether to use Max, Min or Nominal body size when mapping silkscreen outline. However, this feature does not work for THD components. For example, you are not asking to enter min and max values of length and width for DIP packages, Headers, PGA packages and TO-220.

Let's compare PGA and BGA packages. For BGA package you ask to enter min and max values for D (length) and E (width), while for PGA you only ask for max values. Hence for PGA packages you can map silkscreen outline to maximum body size, but you are not able to map to minimum or nominal size. This leads to library inconsistency. Can you please explain why it is done the way it is done?
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