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  <title>PCB Libraries Forum : Pin 1 Inside Courtyard?</title>
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  <pubDate>Tue, 07 Apr 2026 06:15:02 +0000</pubDate>
  <lastBuildDate>Tue, 03 Jun 2014 07:45:14 +0000</lastBuildDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : In CADSTAR the silkscreen outline...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5381.html#5381</link>
   <description>
    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=830">Matthew Lamkin</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 03 Jun 2014 at 7:45am<br /><br />In CADSTAR the silkscreen outline is not shown in the external router so it needs the placement outline, if they are in the same place they cancel each other out when moving so its best slightly inside.<br>]]>
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   <pubDate>Tue, 03 Jun 2014 07:45:14 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : If you choose to have the silkscreen...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5380.html#5380</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 03 Jun 2014 at 7:43am<br /><br /><p>If you choose to have the silkscreen Outside the pads and wrapped all the way around the part you could potentially remove the placement courtyard and use the silkscreen outline instead. </p><p>But if you want both outlines, the courtyard will automatically&nbsp;adjust itself to be greater or equal to the silkscreen outline. The courtyard will never be&nbsp;"inside" the silkscreen outline. </p>]]>
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   <pubDate>Tue, 03 Jun 2014 07:43:20 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : That would be good.Ideally I&amp;#039;d...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5378.html#5378</link>
   <description>
    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=830">Matthew Lamkin</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 03 Jun 2014 at 7:35am<br /><br />That would be good.<br><br>Ideally I'd prefer the silkscreen outline to be outside the pads and inside the placement outline.<br>To do away with additional lines (like dots) and have a simple mitre on chips to denote pin 1.<br><br>That keeps a simple continuous outline.<br>So option 2 I think.<br><br>Cheers Tom.<br>]]>
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   <pubDate>Tue, 03 Jun 2014 07:35:46 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : I forgot to ask about a possible...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5377.html#5377</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 03 Jun 2014 at 7:08am<br /><br />I forgot to ask about a possible new feature for Silkscreen Outlines. <p>Would you like the ability to have 3 different Silkscreen Outline options? </p><ol><li>Inside the pads (just like LP Wizard with a Pin 1 Dot inside the courtyard)</li><li>Outside the pads (just like FP Designer with a chamfer&nbsp;Pin 1&nbsp;marker)</li><li>Hatched (this is the current default with a Pin 1 Line)</li></ol><p>This question will be on our next Poll so we can see if there is a demand for this new feature. </p><p><br></p>]]>
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   <pubDate>Tue, 03 Jun 2014 07:08:19 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : You can turn off any drafting...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5375.html#5375</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 03 Jun 2014 at 6:34am<br /><br /><p>You can turn off any drafting item by changing the line width or size to&nbsp;0 (zero) in User Preferences. </p><p><img src="uploads/3/User_Preferences_Pin_1_Dot.png" height="700" width="837" border="0" /></p><p><br></p>]]>
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   <pubDate>Tue, 03 Jun 2014 06:34:41 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : I&amp;#039;d like to remove the dot...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5374.html#5374</link>
   <description>
    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=830">Matthew Lamkin</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 03 Jun 2014 at 3:58am<br /><br />I'd like to remove the dot full stop <img src="https://www.PCBLibraries.com/forum/smileys/smiley2.gif" border="0" alt="Wink" title="Wink" /><br><br>If it is outside the courtyard it can cover the pads of another component, obviously this is unwanted.<br><br>The component should be "as is" when placed, we should not have to move the pin 1 marker, so containing the marker within the courtyard outline is best.<br><br>So a feature that removes the dot and leaves only the line would be preferred over one that removes the line and leaves a dot.<br>]]>
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   <pubDate>Tue, 03 Jun 2014 03:58:27 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : But there is always a Silkscreen...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5362.html#5362</link>
   <description>
    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 28 May 2014 at 10:15am<br /><br /><p>But there is always a Silkscreen Line the full length of Pin 1 to denote Pin 1 location polarity. </p><p>The dot was added because of high customer demand and it's in addition to the silkscreen line by Pin 1. </p><p>Would you like a new feature that removes the line and replaces it with a Dot? </p><p>Or do you want both the Pin 1 Dot and the Line? </p><p><br></p>]]>
   </description>
   <pubDate>Wed, 28 May 2014 10:15:28 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : Mainly PADS/Expedition. I was...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5361.html#5361</link>
   <description>
    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=71">AGONZ67</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 28 May 2014 at 8:44am<br /><br />Mainly PADS/Expedition. I was just thinking if it was already inside the courtyard, you would never have to touch it again. <br>]]>
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   <pubDate>Wed, 28 May 2014 08:44:06 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : For PADS Layout the Pin 1 Dots...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5359.html#5359</link>
   <description>
    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 27 May 2014 at 5:04pm<br /><br /><p>For PADS Layout the Pin 1 Dots are Attributes and can be freely moved in the PCB layout. </p><p>What CAD tool do you use?</p><p><br></p>]]>
   </description>
   <pubDate>Tue, 27 May 2014 17:04:49 +0000</pubDate>
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   <title><![CDATA[Pin 1 Inside Courtyard? : Is there a reason why these silkscreen...]]></title>
   <link>https://www.PCBLibraries.com/forum/pin-1-inside-courtyard_topic1356_post5358.html#5358</link>
   <description>
    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=71">AGONZ67</a><br /><strong>Subject:</strong> 1356<br /><strong>Posted:</strong> 27 May 2014 at 4:36pm<br /><br /><p>Is there a reason why these silkscreen dots are outside the courtyard? </p><p>If they were moved just slightly to be near the long-side of the pin they could be inside the courtyard eliminating any chance of overlapping another part or feature. <br><br></p>]]>
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   <pubDate>Tue, 27 May 2014 16:36:34 +0000</pubDate>
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