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  <title>PCB Libraries Forum : Thermal Tab Vias</title>
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  <pubDate>Tue, 07 Apr 2026 06:23:07 +0000</pubDate>
  <lastBuildDate>Wed, 06 Nov 2013 15:17:20 +0000</lastBuildDate>
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   <title><![CDATA[Thermal Tab Vias :   Tom H wrote: I would not recommend...]]></title>
   <link>https://www.PCBLibraries.com/forum/thermal-tab-vias_topic1151_post4582.html#4582</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=232">Mattylad</a><br /><strong>Subject:</strong> 1151<br /><strong>Posted:</strong> 06 Nov 2013 at 3:17pm<br /><br /><table width="99%"><tr><td class="BBquote"><img src="forum_images/quote_box.png" title="Originally posted by Tom H" alt="Originally posted by Tom H" style="vertical-align: text-bottom;" /> <strong>Tom H wrote:</strong><br /><br />I would not recommend that you put vias in Thermal Pads in the footprint. &nbsp;</td></tr></table><br><br>On the other hand, many others who lay out boards recognise that it is a very good suggestion to put them in the footprint itself.<br><br>If you add vias per PCB then it is easy to accidentally unroute them, when you move the component the vias do not move with it, if you forget to add the vias even worse etc.<br><br>So having the thermal vias in the centre of a heatsink pad as permanent features in a footprint that will always be there, not unrouted or forgotten can actually make the layout easier to do and trouble free. You should not remove them for routing - they are there for a purpose.<br><br>Thank you for adding this in FPD now, but what are the values referenced to?<br>Can you provide more information on how to do this? perhaps one of your nice videos?<br>]]>
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   <pubDate>Wed, 06 Nov 2013 15:17:20 +0000</pubDate>
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   <title><![CDATA[Thermal Tab Vias :  You can control the Thermal...]]></title>
   <link>https://www.PCBLibraries.com/forum/thermal-tab-vias_topic1151_post4527.html#4527</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 1151<br /><strong>Posted:</strong> 25 Oct 2013 at 1:27pm<br /><br />You can control the Thermal Pad Paste Mask % and you can turn that layer on to see the checkerboard pattern. <div>&nbsp;</div><div>In FP Designer you can manually place the vias on a snap grid in-between the checkerboard patterns. </div><div>&nbsp;</div><div>Interactive Graphic Editing will come some time in V2014. </div><div>&nbsp;</div>]]>
   </description>
   <pubDate>Fri, 25 Oct 2013 13:27:55 +0000</pubDate>
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   <title><![CDATA[Thermal Tab Vias : Thanks. The reason I want them...]]></title>
   <link>https://www.PCBLibraries.com/forum/thermal-tab-vias_topic1151_post4524.html#4524</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=2296">michaelhallin</a><br /><strong>Subject:</strong> 1151<br /><strong>Posted:</strong> 25 Oct 2013 at 6:33am<br /><br />Thanks. The reason I want them in the footprint is that all my footprints also has paste mask defined, and I dont want paste in the vias. The paste mask pattern covers the via holes.<br><br>Are there any chance this will be implemented in the GUI?.<br>]]>
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   <pubDate>Fri, 25 Oct 2013 06:33:16 +0000</pubDate>
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   <title><![CDATA[Thermal Tab Vias :  Here is a Dual Row QFN that...]]></title>
   <link>https://www.PCBLibraries.com/forum/thermal-tab-vias_topic1151_post4523.html#4523</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 1151<br /><strong>Posted:</strong> 25 Oct 2013 at 6:22am<br /><br />Here is a Dual Row QFN that I built in FP Designer and imported the text file to insert the vias - <div>&nbsp;</div><div><img src="uploads/3/Vias_In_Thermal_Pad_FP_Designer.png" height="700" width="924" border="0" /></div><div>&nbsp;</div>]]>
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   <pubDate>Fri, 25 Oct 2013 06:22:22 +0000</pubDate>
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   <title><![CDATA[Thermal Tab Vias :  I would not recommend that you...]]></title>
   <link>https://www.PCBLibraries.com/forum/thermal-tab-vias_topic1151_post4522.html#4522</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 1151<br /><strong>Posted:</strong> 25 Oct 2013 at 6:14am<br /><br />I would not recommend that you put vias in Thermal Pads in the footprint. <div>&nbsp;</div><div>I would add vias in the PCB layout so you can move them around for routing inner layer traces or even remove some if they block routing. </div><div>&nbsp;</div><div>However, if you do want to add vias to the thermal tab in the footprint, you can easily do this in the FP Designer. </div><div>&nbsp;</div><div>I would create a .csv ASCII text file that looks like this and import it to add all the vias - </div><div>&nbsp;</div><div>V1&nbsp;-2.45&nbsp;2.45<br>V2&nbsp;-0.87&nbsp;2.45<br>V3&nbsp;0.87&nbsp;2.45<br>V4&nbsp;2.45&nbsp;2.45<br>V5&nbsp;-2.45&nbsp;0.87<br>V6&nbsp;-0.87&nbsp;0.87<br>V7&nbsp;0.87&nbsp;0.87<br>V8&nbsp;2.45&nbsp;0.87<br>V9&nbsp;-2.45&nbsp;-0.87<br>V10&nbsp;-0.87&nbsp;-0.87<br>V11&nbsp;0.87&nbsp;-0.87<br>V12&nbsp;2.45&nbsp;-0.87<br>V13&nbsp;-2.45&nbsp;-2.45<br>V14&nbsp;-0.87&nbsp;-2.45<br>V15&nbsp;0.87&nbsp;-2.45<br>V16&nbsp;2.45&nbsp;-2.45</div><div>&nbsp;</div><div>You can import a text file with coordinates to insert any specific pad stack.</div><div>&nbsp;&nbsp;</div>]]>
   </description>
   <pubDate>Fri, 25 Oct 2013 06:14:32 +0000</pubDate>
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   <title><![CDATA[Thermal Tab Vias : How can I create a number of vias...]]></title>
   <link>https://www.PCBLibraries.com/forum/thermal-tab-vias_topic1151_post4520.html#4520</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=2296">michaelhallin</a><br /><strong>Subject:</strong> 1151<br /><strong>Posted:</strong> 25 Oct 2013 at 1:33am<br /><br />How can I create a number of vias in the thermal tab of a PowerSO36?<br><br><a href="http://www.st.com/st-web-ui/static/active/en/resource/technical/&#100;ocument/datasheet/CD00002294.pdf" target="_blank" rel="nofollow">http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00002294.pdf</a> <br><br>]]>
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   <pubDate>Fri, 25 Oct 2013 01:33:57 +0000</pubDate>
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