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The following sources have been referenced in this Guideline.
To obtain these documents, click on the document links below:
https://shop.ipc.org/ipc-7352/ipc-7352-standard-only/Revision-0/english" rel="nofollow - IPC-7352 - Generic Guideline for Land Pattern Design (released 05/2023) Footprint Expert’s automatic padstack calculations are fundamentally based on IPC-735x formulas and geometry rules. This is the core standard Footprint Expert uses. It defines: - Land Pattern Naming Conventions for Surface Mount and Through-hole
- Mathematical Model formula for pad stack dimensions
- 3-Tier Density levels for Least, Nominal and Most
- Courtyard Excess toe, heel, and side goals
- IPC-compliant footprint generation rules
https://www.electronics.org/TOC/IPC-J-STD-001G.pdf" rel="nofollow - IPC J-STD-001G - Requirements for Soldered Electrical and Electronic Assemblies (released 10/2017) This standard influences Solder Joint Goals for Toe, Heel and Side fillet targets.
https://store.accuristech.com/standards/ieee-ansi-315-1975?product_id=1843" rel="nofollow - IEEE/ANSI 315-1975 - IEEE Standard for Graphic Symbols for Electrical and Electronics Diagrams (released 12/1975) Standard Reference Designators
https://www.fed.de/fed-shop/produkt/4607/" rel="nofollow - FED Vol 18 - The New Proportional Land Dimensioning Concepts (released 2018) Older proportional land pattern methods influenced the historical development of IPC land pattern standards. Many concepts in the FED Vol 18 evolved into IPC-7351 methodologies.
https://webstore.iec.ch/en/publication/27498" rel="nofollow - IEC_61188-7 - Zero Component Orientation
(released 2007) This is used for: - Component orientation conventions
- Zero-degree placement standards
- Assembly documentation consistency
- Pin-1 Orientation A - Pin 1 Upper Left
- Pin-1 Orientation B - Pin 1 Lower Left
- Rotation/origin conventions
- Pick-and-place consistency
https://store.accuristech.com/standards/ecia-pdp-100?product_id=2585213&srsltid=AfmBOoqPy1miF4yjer8e7u-vEPkiFMRwsnb-W3s3lUpA5xK_E02ShWfU" rel="nofollow - ECIA PDP-100 - Parts Division Publication 100 Registered and Standard Mechanical Outlines for Electronic Parts (released 1987)
| FOOTPRINT EXPERT GUIDELINE Topics | | https://www.pcblibraries.com/forum/terms-and-definitions_topic3672.html" rel="nofollow - Terms & Definitions https://www.pcblibraries.com/forum/component-descriptions_topic3673.html" rel="nofollow - Component Descriptions https://www.pcblibraries.com/forum/threetier-density-levels_topic3674.html" rel="nofollow - Three-Tier Density Levels | | https://www.pcblibraries.com/forum/ipc7352-mathematical-model_topic3675.html" rel="nofollow - IPC-7352 Mathematical Model Solder Joint Goal Tables: [ https://www.pcblibraries.com/forum/surface-mount-solder-joint-goal-tables-min-max_topic3676.html" rel="nofollow - Min/Max ] [ https://www.pcblibraries.com/forum/solder-joint-goal-tables-for-nominal-calculation_topic3677.html" rel="nofollow - Nominal ] | | https://www.pcblibraries.com/forum/manufacturer-recommended-patterns_topic3678.html" rel="nofollow - Manufacturer Recommended https://www.pcblibraries.com/forum/throughhole-terminals_topic3679.html" rel="nofollow - Through-hole Terminals https://www.pcblibraries.com/forum/courtyard-excess_topic3680.html" rel="nofollow - Courtyard Excess | | https://www.pcblibraries.com/forum/pcbl-footprint-naming-convention-surface-mount_topic3681.html" rel="nofollow - PCBL Footprint Convention: SM IPC-7352 Naming Convention: [ https://www.pcblibraries.com/forum/ipc7352-footprint-naming-convention-throughhole_topic3682.html" rel="nofollow - Footprint TH ] [ https://www.pcblibraries.com/forum/ipc7352-pad-stack-naming-convention_topic3685.html" rel="nofollow - Pad Stack ] | | https://www.pcblibraries.com/forum/oda-pad-stack-naming-convention_topic3686.html" rel="nofollow - ODA Pad Stack Convention https://www.pcblibraries.com/forum/terminal-lead-forms_topic3687.html" rel="nofollow - Terminal Lead Forms https://www.pcblibraries.com/forum/pad-shapes_topic3688.html" rel="nofollow - Pad Shapes https://www.pcblibraries.com/forum/design-units_topic3689.html" rel="nofollow - Design Units | | https://www.pcblibraries.com/forum/fpx-file-definition_topic3690.html" rel="nofollow - FPX File Definition https://www.pcblibraries.com/forum/smd-pad-stack-rules_topic3691.html" rel="nofollow - SMD Pad Stack Rules https://www.pcblibraries.com/forum/drafting-outlines-polarity-marking_topic3692.html" rel="nofollow - Drafting Outlines & Polarity Marking | | https://www.pcblibraries.com/forum/package-and-terminal-tolerances_topic3693.html" rel="nofollow - Package & Terminal Tolerances https://www.pcblibraries.com/forum/zero-component-orientation_topic3694.html" rel="nofollow - Zero Component Orientation | | https://www.pcblibraries.com/forum/standard-reference-designators_topic3695.html" rel="nofollow - Standard Reference Designators Component Families: [ https://www.pcblibraries.com/forum/surface-mount-component-families_topic3696.html" rel="nofollow - Surface Mount ] [ https://www.pcblibraries.com/forum/throughhole-component-families_topic3697.html" rel="nofollow - Through-hole ] |
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